參數(shù)資料
型號: 57C51C-70
廠商: 意法半導體
英文描述: HIGH SPEED 16K x 8 CMOS PROM/RPROM
中文描述: 高速16K的× 8的CMOS胎膜早破/ RPROM
文件頁數(shù): 1/7頁
文件大?。?/td> 53K
代理商: 57C51C-70
PRODUCT SELECTION GUIDE
PARAMETER
Address Access Time (Max)
CS to Output Valid Time (Max)
57C51C-35
35 ns
20 ns
57C51C-45
45 ns
20 ns
57C51C-55
55 ns
25 ns
57C51C-70
70 ns
30 ns
WS57C51C
2-47
HIGH SPEED 16K x 8 CMOS PROM/RPROM
KEY FEATURES
Very Fast Access Time
35 ns
Low Power Consumption
Fast Programming
Pin Compatible with Am27S51
and N82HS1281
Immune to Latch-Up
Up to 200 mA
ESD Protection Exceeds 2000 V
GENERAL DESCRIPTION
The WS57C51C is a High Performance 128K UV Erasable Electrically Re-Programmable Read Only Memory
(RPROM). It is manufactured in an advanced CMOS technology which enables it to operate at Bipolar PROM
speeds while consuming only 25% of the power required by its Bipolar counterparts.
A further advantage of the WS57C51C over Bipolar PROM devices is the fact that it utilizes a proven EPROM
technology. This enables the entire memory array to be tested for switching characteristics and functionality after
assembly. Unlike devices which cannot be erased, every WS5751C in a windowed package is 100% tested with
worst case test patterns both before and after assembly.
The WS57C51C provides a low power alternative to those designs which are committed to a Bipolar PROM
footprint. It is a direct drop-in replacement for a Bipolar PROM of the same architecture (16K x 8). No software,
hardware or layout changes need be performed.
V
CC
A10
A11
A12
A13
CS1/VPP
CS2
CS3
CS4
O
7
O
6
O
5
O
4
O
3
A
9
A
8
A
7
A
6
A
5
A
4
A
3
A
2
A
1
A
0
O
0
O
1
O
2
GND
1
2
3
4
5
6
7
8
9
10
11
12
13
14
28
27
26
25
24
23
22
21
20
19
18
17
16
15
A
12
A
13
CS1/V
PP
CS2
CS3
CS4
NC
O
7
O
6
A
5
A
4
A
3
A
2
A
1
A
0
NC
O
0
O
1
A
6
A
7
A
8
A
9
V
C
A
1
A
1
O
2
NC
O
3
NC
O
4
O
5
G
1
4 3
2
32 31 30
29
28
27
26
25
24
23
22
21
5
6
7
8
9
10
11
12
13
14 15 16 17 18 19 20
TOP VIEW
Chip Carrier
CERDIP
PIN CONFIGURATION
ROW
DECODER
EPROM ARRAY
131,072 BITS
COLUMN
DECODER
SENSE
AMPLIFIERS
8
CS3
CS4
OUTPUTS
CS1/V
PP
A0 - A5
COLUMN
ADDRESSES
A6 - A13
ROW
ADDRESSES
8
6
CS2
BLOCK DIAGRAM
Return to Main Menu
相關PDF資料
PDF描述
57C51C-35 HIGH SPEED 16K x 8 CMOS PROM/RPROM
57C51C-45 HIGH SPEED 16K x 8 CMOS PROM/RPROM
57C51C-55 HIGH SPEED 16K x 8 CMOS PROM/RPROM
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