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參數(shù)資料
| 型號： | 558G-01LF |
| 英文描述： | PECL/CMOS TO CMOS CLOCK DIVIDER |
| 中文描述： | PECL的/ CMOS半導體技術的CMOS時鐘分頻器 |
| 文件頁數(shù)： | 1/5頁 |
| 文件大?。?/td> | 88K |
| 代理商： | 558G-01LF |
ICS558-01
MDS 558-01 C
1
Revision 122105
Integrated Circuit Systems
●
525 Race Street, San Jose, CA 95126
●
tel (408) 297-1201
●
www.icst.com
PECL/CMOS
TO
CMOS C
LOCK
D
IVIDER
Description
The ICS558-01 accepts a high speed input of either
PECL or CMOS, integrates a divider of 1, 2, 3, or 4, and
provides four CMOS low skew outputs. The chip also
has output enables so that one, three, or all four
outputs can be tri-stated.
The ICS558-01 is a member of the ICS Clock Blocks
family of clock generation, synchronization, and
distribution devices.
Features
16-pin TSSOP package
Available in Pb (lead) free package
Selectable PECL or CMOS inputs
Operates up to 250 MHz
Works as a voltage translator
Four low skew (<250 ps) outputs
Selectable internal divider
Operating input voltages of 3.3 V or 5.0 V
Operating output voltages of 2.5 V, 3.3 V or 5.0 V
Ideal for IA64 designs
Block Diagram
OE1
CLK1
CLK2
CLK3
CLK4
PECLIN
Output Divide
PECLIN
S0, S1
GND
VDDP
OE0
GND
VDDC
2
1
0
CMOSIN
SELPECL
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相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| 558G-01LFT | 功能描述:時鐘驅(qū)動器及分配 PECL/CMOS TO CMOS CLOCK DRIVER RoHS:否 制造商:Micrel 乘法/除法因子:1:4 輸出類型:Differential 最大輸出頻率:4.2 GHz 電源電壓-最大: 電源電壓-最小:5 V 最大工作溫度:+ 85 C 封裝 / 箱體:SOIC-8 封裝:Reel |
| 558G02 | 制造商:ICS 功能描述: |
| 558G-02 | 制造商:Integrated Device Technology Inc 功能描述:CLOCK DIVIDER 16TSSOP - Rail/Tube |
| 558G-02T | 制造商:Integrated Device Technology Inc 功能描述:CLOCK DIVIDER 16TSSOP - Tape and Reel |
| 558GMS 0001000 | 制造商:Belden Inc 功能描述:Access Control Composite Cable 制造商:Belden Inc 功能描述:SHLD COMPOSITE CABLE, 18COND, 22/18AWG,1000FT,300V, Reel Length (Imperial):1000f |
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