參數(shù)資料
型號(hào): 550MB311M040DG
廠商: SILICON LABORATORIES
元件分類(lèi): VCXO, clock
英文描述: VCXO, CLOCK, 311.04 MHz, LVPECL OUTPUT
封裝: ROHS COMPLIANT PACKAGE-6
文件頁(yè)數(shù): 12/14頁(yè)
文件大小: 230K
代理商: 550MB311M040DG
Si550
Rev. 0.6
7
2. Pin Descriptions
Table 10. Si550 Pin Descriptions
Pin
Name
Type
Function
1
VC
Analog Input
Control Voltage
2
OE*
Input
Output Enable (Polarity = High):
0 = clock output disabled (outputs tri-stated)
1 = clock output enabled
3
GND
Ground
Electrical and Case Ground
4
CLK+
Output
Oscillator Output
5
CLK–
(N/A for CMOS)
Output
Complementary Output
(N/C for CMOS)
6
VDD
Power
Power Supply Voltage
*Note: OE includes 17 k
pullup resistor to VDD. See Section 3. "Ordering Information" on page 8 for details on OE polarity
ordering options.
1
2
3
6
5
4
VC
GND
OE
VDD
CLK+
CLK–
(Top View)
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
550MB311M040DGR 制造商:Silicon Laboratories Inc 功能描述:
550MC000106DG 制造商:Silicon Laboratories Inc 功能描述:CNTRLD OSC 132.8125MHZ VCXO LVPECL 6SMD - Trays
550MC000106DGR 制造商:Silicon Laboratories Inc 功能描述:CNTRLD OSC 132.8125MHZ VCXO LVPECL 6SMD - Tape and Reel
550MC000109DG 制造商:Silicon Laboratories Inc 功能描述:CNTRLD OSC 142.29911MHZ VCXO LVPECL 6SMD - Trays
550MC000109DGR 制造商:Silicon Laboratories Inc 功能描述:CNTRLD OSC 142.29911MHZ VCXO LVPECL 6SMD - Tape and Reel