參數(shù)資料
型號(hào)： 514SCCXXXXXXAAG
廠商： SILICON LABORATORIES
元件分類(lèi)： XO, clock
英文描述： 125 MHz, OTHER CLOCK GENERATOR, PDSO6
封裝： 5 X 7 MM, ROHS COMPILANT PACKAGE-6
文件頁(yè)數(shù)： 24/32頁(yè)
文件大?。?/td> 267K
代理商： 514SCCXXXXXXAAG
Si514
30
Preliminary Rev. 0.9
11. PCB Land Pattern: 3.2 x 5.0 mm, 6-pin
Figure 13 illustrates the 3.2 x 5.0 mm PCB land pattern for the Si514. Table 16 lists the values for the dimensions
shown in the illustration.
Figure 13. Si514 Recommended PCB Land Pattern
Table 16. PCB Land Pattern Dimensions (mm)
Dimension
(mm)
C1
2.60
E1.27
X1
0.80
Y1
1.70
Notes:
General
1.
All dimensions shown are in millimeters (mm) unless otherwise noted.
2.
Dimensioning and Tolerancing is per the ANSI Y14.5M-1994 specification.
3.
This Land Pattern Design is based on the IPC-7351 guidelines.
4.
All dimensions shown are at Maximum Material Condition (MMC). Least Material
Condition (LMC) is calculated based on a Fabrication Allowance of 0.05 mm.
Solder Mask Design
5.
All metal pads are to be non-solder mask defined (NSMD). Clearance between the
solder mask and the metal pad is to be 60 m minimum, all the way around the
pad.
Stencil Design
6.
A stainless steel, laser-cut and electro-polished stencil with trapezoidal walls
should be used to assure good solder paste release.
7.
The stencil thickness should be 0.125 mm (5 mils).
8.
The ratio of stencil aperture to land pad size should be 1:1.
Card Assembly
9.
A No-Clean, Type-3 solder paste is recommended.
10.
The recommended card reflow profile is per the JEDEC/IPC J-STD-020
specification for Small Body Components.
相關(guān)PDF資料
PDF描述
5962-9162303MXC GRAPHICS PROCESSOR, CPGA145
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5962H9215306VMX 32K X 8 STANDARD SRAM, 60 ns, CDIP28
5962-9309104HYX 512K X 8 EEPROM 5V MODULE, 200 ns, CDIP32
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參數(shù)描述
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