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參數(shù)資料
| 型號： | 4096B |
| 元件分類： | 復(fù)位半導(dǎo)體 |
| 英文描述： | 300mA LDO Linear Regulators with Internal Microprocessor Reset Circuit |
| 中文描述： | 門JK主從觸發(fā)器（295.01十一） |
| 文件頁數(shù)： | 1/13頁 |
| 文件大?。?/td> | 295K |
| 代理商： | 4096B |
HCC/HCF4095B
HCC/HCF4096B
September 1988
GATE J-K MASTER-SLAVE FLIP-FLOPS
EY
(Plastic Package)
DESCRIPTION
ORDER CODES :
HCC40XXBF
HCF40XXBEY
HCF40XXBM1
HCF40XXBC1
F
(CeramicPackage)
M1
(MicroPackage)
C1
(Chip Carrier)
PIN CONNECTIONS
The
HCC4095B/4096B
(extended temperature
range) and
HCF4095B/4096B
(intermediate tem-
perature range) are monolithic integrated circuits,
available in 14 lead dual in-line plastic or ceramic
package and plastic micropackage.
The
HCC/HCF4095B
and
HCC/HCF4096B
areJ-K
Master-Slave Flip-Flops featuring separate AND
gatingofmultipleJand Kinputs. The gated J-Kinput
control transfer of information into the master sec-
tionduring clockedoperation.InformationontheJ-K
.
16 MHz TOGGLERATE (typ.) AT
V
DD
- V
SS
= 10V
.
GATEDINPUTS
.
QUIESCENT CURRENT SPECIFIED TO 20v
FOR HCC DEVICE
.
5V, 10V AND 15V PARAMETRIC RATINGS
.
INPUTCURRENTOF100nAAT18VAND 25oC
FOR HCC DEVICE
.
100% TESTEDFOR QUIESCENTCURRENT
.
MEETSALLREQUIREMENTSOFJEDECTEN-
TATIVE STANDARD No 13 A, ”STANDARD
SPECIFICATIONS FOR DESCRIPTION OF B
SERIESCMOS DEVICES”
inputs is transferred to the Q and Q outputs on the
positive edge of the clock pulse. SET and RESET
inputs (active high) are provided for asynchronous
operation.
4095B
4096B
1/13
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