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參數(shù)資料
| 型號： | 40430B |
| 英文描述： | 4kbit EEPROM, Triple Voltage Monitor with Integrated CPU Supervisor |
| 中文描述： | 4kbit的EEPROM，三電壓監(jiān)視器集成CPU監(jiān)控 |
| 文件頁數(shù)： | 2/24頁 |
| 文件大?。?/td> | 421K |
| 代理商： | 40430B |
X40430/X40431 – Preliminary Information
Characteristics subject to change without notice.
2 of 24
REV 1.2.3 11/28/00
www.xicor.com
A manual reset input provides debounce circuitry for
minimum reset component count.
The Watchdog Timer provides an independent protec-
tion mechanism for microcontrollers. When the micro-
controller fails to restart a timer within a selectable time
out interval, the device activates the WDO signal. The
user selects the interval from three preset values. Once
selected, the interval does not change, even after
cycling the power.
The memory portion of the device is a CMOS Serial
EEPROM array with Xicor’s Block Lock protection. The
array is internally organized as x 8. The device features
a 2-wire interface and software protocol allowing opera-
tion on an I
C bus.
2
The device utilizes Xicor’s proprietary Direct Write
cell, providing a minimum endurance of 1,000,000
cycles and a minimum data retention of 100 years.
PIN CONFIGURATION
PIN DESCRIPTION
Pin
1
Name
V2FAIL
Function
V2 Voltage Fail Output.
goes HIGH when V2MON exceeds V
V2 Voltage Monitor Input.
LOW. This input can monitor an unregulated power supply with an external resistor divider or can
monitor a second power supply with no external components. Connect V2MON to V
when not used.
Early Low V
CC
Detect.
This CMOS output signal goes LOW when
V
when
V
CC
> V
TRIP1
.
No connect.
Manual Reset Input.
Pulling the MR pin LOW initiates a system reset. The RESET/RESET pin will
remain HIGH/LOW until the pin is released and for the t
RESET Output.
(X40431) This open drain pin is an active LOW output which goes LOW whenever
V
CC
falls below V
TRIP
voltage or if manual reset is asserted. This output stays active for the pro-
grammed time period (t
PURST
) on power up. It will also stay active until manual reset is released
and for t
PURST
thereafter.
RESET Output.
(X40430) This pin is an active HIGH CMOS output which goes HIGH whenever
V
CC
falls below V
TRIP
voltage or if manual reset is asserted. This output stays active for the pro-
grammed time period (t
PURST
) on power up. It will also stay active until manual reset is released
and for t
PURST
thereafter.
Ground
This open drain output goes LOW when V2MON is less than V
TRIP2
. There is no power up reset delay circuitry on this pin.
When the V2MON input is less than the V
TRIP2
and
2
V2MON
TRIP2
voltage, V2FAIL goes
SS
or
V
CC
3
LOWLINE
CC
< V
TRIP1
and goes high
4
5
NC
MR
PURST
thereafter.
6
RESET/
RESET
7
V
SS
V3MON
WP
V
SS
V
CC
WDO
SDA
SCL
3
4
5
2
1
12
11
10
13
14
LOWLINE
NC
MR
RESET
7
6
8
9
V2MON
3
4
5
2
1
12
11
10
13
14
7
6
8
9
V3FAIL
V2FAIL
V3MON
WP
V
CC
WDO
SDA
SCL
V3FAIL
V
SS
LOWLINE
NC
MR
RESET
V2MON
V2FAIL
X40430
X40431
14-Pin SOIC, TSSOP
14-Pin SOIC, TSSOP
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| 40430C | 制造商:XICOR 制造商全稱:Xicor Inc. 功能描述:4kbit EEPROM, Triple Voltage Monitor with Integrated CPU Supervisor |
| 40430X | 制造商:XICOR 制造商全稱:Xicor Inc. 功能描述:4kbit EEPROM, Triple Voltage Monitor with Integrated CPU Supervisor |
| 404310 | 制造商:MAGNUM / COOPER 功能描述: |
| 40431-0010 | 制造商:OMRON INDUSTRIAL AUTOMATION 功能描述:MS4800-ADPT-TXS |
| 40431-0020 | 制造商:OMRON INDUSTRIAL AUTOMATION 功能描述:MS4800-ADPT-TXM |
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