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參數(shù)資料
| 型號： | 40430B |
| 英文描述： | 4kbit EEPROM, Triple Voltage Monitor with Integrated CPU Supervisor |
| 中文描述： | 4kbit的EEPROM，三電壓監(jiān)視器集成CPU監(jiān)控 |
| 文件頁數(shù)： | 17/24頁 |
| 文件大?。?/td> | 421K |
| 代理商： | 40430B |
X40430/X40431 – Preliminary Information
Characteristics subject to change without notice.
17 of 24
REV 1.2.3 11/28/00
www.xicor.com
A.C. CHARACTERISTICS
Note:
(1) Cb = total capacitance of one bus line in pF.
TIMING DIAGRAMS
Bus Timing
Symbol
f
SCL
t
IN
t
AA
t
BUF
t
LOW
t
HIGH
t
SU:STA
t
HD:STA
t
SU:DAT
t
HD:DAT
t
SU:STO
t
DH
t
R
t
F
t
SU:WP
t
HD:WP
Cb
Parameter
Min.
0
50
0.1
1.3
1.3
0.6
0.6
0.6
100
0
0.6
50
Max.
400
Unit
kHz
ns
μs
μs
μs
μs
μs
μs
ns
μs
μs
ns
ns
ns
μs
μs
pF
SCL Clock Frequency
Pulse width Suppression Time at inputs
SCL LOW to SDA Data Out Valid
Time the bus free before start of new transmission
Clock LOW Time
Clock HIGH Time
Start Condition Setup Time
Start Condition Hold Time
Data In Setup Time
Data In Hold Time
Stop Condition Setup Time
Data Output Hold Time
SDA and SCL Rise Time
SDA and SCL Fall Time
WP Setup Time
WP Hold Time
Capacitive load for each bus line
0.9
20 +.1Cb
(1)
20 +.1Cb
(1)
0.6
0
300
300
400
t
SU:STO
t
HIGH
t
SU:STA
t
HD:STA
t
HD:DAT
t
SU:DAT
SCL
SDA IN
SDA OUT
t
F
t
LOW
t
BUF
t
R
t
DH
t
AA
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| 4043B | Quadruple R/S latch with 3-state outputs |
| 4044-UCA | 300mA LDO Linear Regulators with Internal Microprocessor Reset Circuit |
| 4044-UCB | 300mA LDO Linear Regulators with Internal Microprocessor Reset Circuit |
| L4044-UCA | x1 SRAM |
| L4044-UCB | x1 SRAM |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| 40430C | 制造商:XICOR 制造商全稱:Xicor Inc. 功能描述:4kbit EEPROM, Triple Voltage Monitor with Integrated CPU Supervisor |
| 40430X | 制造商:XICOR 制造商全稱:Xicor Inc. 功能描述:4kbit EEPROM, Triple Voltage Monitor with Integrated CPU Supervisor |
| 404310 | 制造商:MAGNUM / COOPER 功能描述: |
| 40431-0010 | 制造商:OMRON INDUSTRIAL AUTOMATION 功能描述:MS4800-ADPT-TXS |
| 40431-0020 | 制造商:OMRON INDUSTRIAL AUTOMATION 功能描述:MS4800-ADPT-TXM |
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