參數(shù)資料
型號: 37LV128-L
廠商: Microchip Technology Inc.
英文描述: DIODE ZENER SINGLE 150mW 2.4Vz 5mA-Izt 0.083 50uA-Ir 1 SOD-523 3K/REEL
中文描述: 36K,64K的,和128K串行EPROM家庭
文件頁數(shù): 7/12頁
文件大?。?/td> 88K
代理商: 37LV128-L
1996 Microchip Technology Inc.
DS21109E-page 7
37LV36/65/128
TABLE 11-4:
DC PROGRAMMING SPECIFICATIONS
TABLE 11-5:
AC PROGRAMMING SPECIFICATIONS (SEE NOTE 2)
Symbol
Parameter
Ambient Temperature: Tamb = 25
°
C
±
5
°
C
Limits
Units
Min.
Max.
V
CCP
Supply voltage during programming
5.0
6.0
V
V
IL
Low-level input voltage
0.0
0.5
V
V
IH
High-level input voltage
2.4
V
CC
V
V
OL
Low-level output voltage
0.4
V
V
OH
High-level output voltage
3.7
V
V
PP
1
Programming voltage*
12.5
13.5
V
V
PP
2
Programming Mode access voltage
V
CCP
V
CCP
+1
V
I
PPP
Supply current in Programming Mode
100
mA
I
L
Input or output leakage current
-10
10
μ
A
V
CCL
First pass Low-level supply voltage for final verification
2.8
3.0
V
V
CCH
Second pass High-level supply voltage for final verification
6.4
6.6
V
* No overshoot is permitted on this signal. VPP must not be allowed to exceed 14 volts.
Symbol
Parameter
Limits
Units
Conditions
Min.
Max.
T
RPP
10% to 90% Rise Time of V
PP
1
μ
s
Note 1
T
FPP
90% to 10% Fall Time of V
PP
1
μ
s
Note 1
T
PGM
V
PP
Programming Pulse Width
.50
1.05
ms
T
SVC
V
PP
Setup to CLK for Entering Programming Mode
100
ns
Note 1
T
SVCE
CE Setup to CLK for Entering Programming Mode
100
ns
Note 1
T
SVOE
OE Setup to CLK for Entering Programming Mode
100
ns
Note 1
T
HVC
V
PP
Hold from CLK for Entering Programming Mode
300
ns
Note 1
T
SDP
Data Setup to CLK for Programming
50
ns
T
HDP
Data Hold from CLK for Programming
0
ns
T
LCE
CE Low time to clear data latches
100
ns
T
SCC
CE Setup to CLK for Programming/Verifying
100
ns
T
SIC
OE Setup to CLK for Incrementing Address Counter
100
ns
T
HIC
OE Hold from CLK for Incrementing Address Counter
0
ns
T
HOV
OE Hold from V
PP
200
ns
Note 1
T
PCAC
CLK to Data Valid
400
ns
T
POH
Data Hold from CLK
0
ns
T
PCE
CE Low to Data Valid
250
ns
Note 1:
This parameter is periodically sampled and not 100% tested.
Note 2:
While in Programming Mode, CE should only be changed while OE is HIGH and has been HIGH for 200 ns,
and OE should only be changed while CE is HIGH and has been HIGH for 200 ns.
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