- 您現在的位置：買賣IC網 > PDF目錄156551 > 37C67X (SMSC Corporation) ENHANCED SUPER I/O CONTROLLER WITH FAST IR PDF資料下載
參數資料
| 型號： | 37C67X |
| 廠商： | SMSC Corporation |
| 英文描述： | ENHANCED SUPER I/O CONTROLLER WITH FAST IR |
| 中文描述： | 增強的超級I / O控制器，快速紅外線 |
| 文件頁數： | 157/194頁 |
| 文件大?。?/td> | 546K |
| 代理商： | 37C67X |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁第53頁第54頁第55頁第56頁第57頁第58頁第59頁第60頁第61頁第62頁第63頁第64頁第65頁第66頁第67頁第68頁第69頁第70頁第71頁第72頁第73頁第74頁第75頁第76頁第77頁第78頁第79頁第80頁第81頁第82頁第83頁第84頁第85頁第86頁第87頁第88頁第89頁第90頁第91頁第92頁第93頁第94頁第95頁第96頁第97頁第98頁第99頁第100頁第101頁第102頁第103頁第104頁第105頁第106頁第107頁第108頁第109頁第110頁第111頁第112頁第113頁第114頁第115頁第116頁第117頁第118頁第119頁第120頁第121頁第122頁第123頁第124頁第125頁第126頁第127頁第128頁第129頁第130頁第131頁第132頁第133頁第134頁第135頁第136頁第137頁第138頁第139頁第140頁第141頁第142頁第143頁第144頁第145頁第146頁第147頁第148頁第149頁第150頁第151頁第152頁第153頁第154頁第155頁第156頁當前第157頁第158頁第159頁第160頁第161頁第162頁第163頁第164頁第165頁第166頁第167頁第168頁第169頁第170頁第171頁第172頁第173頁第174頁第175頁第176頁第177頁第178頁第179頁第180頁第181頁第182頁第183頁第184頁第185頁第186頁第187頁第188頁第189頁第190頁第191頁第192頁第193頁第194頁
65
On the read back by the FDC, the controller
must begin synchronization at the beginning of
the sync field. For the conventional mode, the
internal
PLL
VCO
is
enabled
(VCOEN)
approximately 24 bytes from the start of the
Gap2 field. But, when the controller operates in
the 1 Mbps perpendicular mode (WGATE = 1,
GAP = 1), VCOEN goes active after 43 bytes to
accommodate the increased Gap2 field size.
For both cases, and approximate two-byte
cushion is maintained from the beginning of the
sync field for the purposes of avoiding write
splices in the presence of motor speed variation.
For the Write Data case, the FDC activates
Write Gate at the beginning of the sync field
under the conventional mode.
The controller
then writes a new sync field, data address mark,
data field, and CRC as shown on page 57. With
the pre-erase head of the perpendicular drive,
the write head must be activated in the Gap2
field to insure a proper write of the new sync
field.
For the 1 Mbps perpendicular mode
(WGATE = 1, GAP = 1), 38 bytes will be written
in the Gap2 space. Since the bit density is
proportional to the data rate, 19 bytes will be
written in the Gap2 field for the 500 Kbps
perpendicular mode (WGATE = 1, GAP =0).
It should be noted that none of the alterations in
Gap2 size, VCO timing, or Write Gate timing
affect normal program flow.
The information
provided here is just for background purposes
and is not needed for normal operation. Once
the Perpendicular Mode command is invoked,
FDC software behavior from the user standpoint
is unchanged.
The perpendicular mode command is enhanced
to
allow
specific
drives
to
be
designated Perpendicular recording drives. This
enhancement allows data transfers between
Conventional and Perpendicular drives without
having to issue Perpendicular mode commnds
between the accesses of the different drive
types,
nor
having
to
change
write
pre-
compensation values.
When both GAP and WGATE bits of the
PERPENDICULAR MODE COMMAND are both
programmed to "0" (Conventional mode), then
D0, D1, D2, D3, and D4 can be programmed
independently to "1" for that drive to be set
automatically to Perpendicular mode.
In this
mode the following set of conditions also apply:
1. The GAP2 written to a perpendicular drive
during a write operation will depend upon the
programmed data rate.
2. The write pre-compensation given to a
perpendicular mode drive will be 0ns.
3. For
D0-D3
programmed
to
"0"
for
conventional mode drives any data written
will be at the currently programmed write
pre-compensation.
Note: Bits D0-D3 can only be overwritten when
OW is programmed as a "1".If either
GAP or WGATE is a "1" then D0-D3 are
ignored.
Software
and
hardware
resets
have
the
following
effect
on
the
PERPENDICULAR
MODE COMMAND:
1. "Software" resets (via the DOR or DSR
registers) will only clear GAP and WGATE
bits to "0". D0-D3 are unaffected and retain
their previous value.
2. "Hardware"
resets will clear all bits
(GAP, WGATE and D0-D3) to "0", i.e all
conventional mode.
相關PDF資料 |
PDF描述 |
|---|---|
| 37C957FR | ULTRA I/O CONTROLLER FOR PORTABLE APPLICATIONS |
| 37FMA1-ABW31N | SPECIAL SWITCH-PIEZO SWITCH, SPST, MOMENTARY, 0.2A, 24VDC, PANEL MOUNT-THREADED |
| 37FML1-BEW31N | SPECIAL SWITCH-PIEZO SWITCH, SPST, MOMENTARY, 0.2A, 24VDC, PANEL MOUNT-THREADED |
| 37FML2-ACW21N | SPECIAL SWITCH-PIEZO SWITCH, SPST, MOMENTARY, 1A, 24VDC, PANEL MOUNT-THREADED |
| 37FMA1-AAW11N | SPECIAL SWITCH-PIEZO SWITCH, SPST, MOMENTARY, 0.2A, 24VDC, PANEL MOUNT-THREADED |
相關代理商/技術參數 |
參數描述 |
|---|---|
| 37C-6BH-5-5 | 制造商:Birtcher Products 功能描述: |
| 37C72U-185 | 制造商:White-Rodgers 功能描述: |
| 37C73U-170 | 制造商:White-Rodgers 功能描述: |
| 37C73U-171 | 制造商:White-Rodgers 功能描述: |
| 37C922BQFP | 制造商:SMSC 功能描述: |
發(fā)布緊急采購，3分鐘左右您將得到回復。