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| 型號： | 3745SN |
| 廠商： | Linear Technology Corporation |
| 元件分類： | 基準電壓源/電流源 |
| 英文描述： | RADIATION HARDENED HIGH EFFICIENCY, 5 AMP SWITCHING REGULATORS |
| 中文描述： | 抗輻射高效，5安培開關(guān)穩(wěn)壓器 |
| 文件頁數(shù)： | 23/32頁 |
| 文件大?。?/td> | 309K |
| 代理商： | 3745SN |
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23
LT1374
1374fb
APPLICATIO
S I
FOR
ATIO
U
W
U
U
What About a Resistor in the Compensation Network
It is common practice in switching regulator design to
add a “zero” to the error amplifier compensation to
increase loop phase margin. This zero is created in the
external network in the form of a resistor (R
C
) in series
with the compensation capacitor. Increasing the size of
this resistor generally creates better and better loop
stability, but there are two limitations on its value. First,
the combination of output capacitor ESR and a large
value for R
C
may cause loop gain to stop rolling off
altogether, creating a gain margin problem. An approxi-
mate formula for R
C
where gain margin falls to zero is:
R Loop
V
G
G
ESR
OUT
MP
MA
Gain =1
(
)
=
(
)(
)(
)
2 42
G
MP
= Transconductance of power stage = 5.3A/V
G
MA
= Error amplifier transconductance = 2(10
–3
)
ESR = Output capacitor ESR
2.42 = Reference voltage
With V
OUT
= 5V and ESR = 0.03
, a value of 6.5k for R
C
would yield zero gain margin, so this represents an upper
limit. There is a second limitation however which has
nothing to do with theoretical small signal dynamics.
This resistor sets high frequency gain of the error ampli-
fier, including the gain at the switching frequency. If
switching frequency gain is high enough, output ripple
voltage will appear at the V
C
pin with enough amplitude
to muck up proper operation of the regulator. In the
marginal case, subharmonic switching occurs, as evi-
denced by alternating pulse widths seen at the switch
node. In more severe cases, the regulator squeals or
hisses audibly even though the output voltage is still
roughly correct. None of this will show on a theoretical
Bode plot because Bode is an amplitude insensitive
analysis. Tests have shown that f ripple voltage on the V
C
is held to less than 100mV
P-P
, the LT1374 will be well
behaved The formula below will give an estimate of V
C
ripple voltage when R
C
is added to the loop, assuming
that R
C
is large compared to the reactance of C
C
at
500kHz.
V
R
G
V
( )( )( )
V
ESR
)(
V
L f
C RIPPLE
C
MA
IN
OUT
IN
)
=
( )(
)
(
)( )
2 4
.
G
MA
= Error amplifier transconductance (2000
μ
Mho)
If a computer simulation of the LT1374 showed that a
series compensation resistor of 3k gave best overall loop
response, with adequate gain margin, the resulting V
C
pin
ripple voltage with V
IN
= 10V, V
OUT
= 5V, ESR = 0.1
,
L = 10
μ
H, would be:
=
( )
( )
V
k
V
C RIPPLE
)
(
500 10
=
3
2 10
10 5 0 1 2 4
10 10 10
0 144
.
3
6
3
.
.
This ripple voltage is high enough to possibly create
subharmonic switching. In most situations a compromise
value (<2k in this case) for the resistor gives acceptable
phase margin and no subharmonic problems. In other
cases, the resistor may have to be larger to get acceptable
phase response, and some means must be used to control
ripple voltage at the V
C
pin. The suggested way to do this
is to add a capacitor (C
F
) in parallel with the R
C
/C
C
network
on the V
C
pin. Pole frequency for this capacitor is typically
set at one-fifth of switching frequency so that it provides
significant attenuation of switching ripple, but does not
add unacceptable phase shift at loop unity-gain frequency.
With R
C
= 3k,
C
f R
k
pF
F
C
=
( )( )( )
=
( )
=
5
2
5
2
500 10
3
531
3
π
π
How Do I Test Loop Stability
The “standard” compensation for LT1374 is a 1.5nF
capacitor for C
C
, with R
C
= 0. While this compensation will
work for most applications, the “optimum” value for loop
compensation components depends, to various extent, on
parameters which are not well controlled. These include
inductor value (
±
30% due to production tolerance, load
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