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參數(shù)資料
| 型號： | 3710EFE |
| 廠商： | Linear Technology Corporation |
| 英文描述： | Secondary Side Synchronous Post Regulator |
| 中文描述： | 二次側(cè)同步后穩(wěn)壓器 |
| 文件頁數(shù)： | 5/12頁 |
| 文件大小： | 226K |
| 代理商： | 3710EFE |
LT3710
5
3710f
BOOST (Pin 1):
Topside (Boosted) Driver Supply. This pin
is used to bootstrap and supply the topside power switch
gate drive circuitry. In normal operation V
BOOST
is powered
from the internally generated 8V GBIAS, V
BOOST
= V
SW
+
8.2V when TGATE is on.
TGATE (Pin 2):
Topside (Boosted) N-Channel MOSFET
Driver. When TGATE is on, the voltage is equal to V
SW
+ 6V.
SW (Pin 3):
Switch Node Connection to Inductor.
CSET (Pin 4):
Oscillator Timing Pin. The capacitor on this
pin sets the PWM switching frequency.
SYNC (Pin 5):
Synchronization Input. This pin should be
connected to the secondary side output of the power
transformer with a series resistor. A filtering capacitor of
10pF is recommended.
ILCOMP (Pin 6):
Current Limit Amplifier Compensation
Node. At current limit, CA1 pulls down on this pin to
regulate the output current.
SS (Pin 7):
Soft-Start. A capacitor on this pin sets the
output ramp up rate. The typical time for SS to reach the
programmed level is (C 0.8V)/10
μ
A.
V
FB
(Pin 8):
Voltage Amplifier Inverting Input. A resistor
divider to this pin sets the output voltage. Nominal voltage
at this pin is 0.8V.
PIU
BGS (Pin 9):
Bottom Gate Switching Control. CA2 moni-
tors the inductor current and prohibits BGATE from turn-
ing on when the inductor current is low (below 8mV across
the current sense resistor RS1) to allow discontinous
mode operation. Grounding this pin disables comparator
CA2.
VA
OUT
(Pin 10):
Voltage Amplifier Output.
CL
+
(Pin 11):
Current Limit Amplifier Positive Input. The
threshold is set at 70mV.
CL
–
(Pin 12):
Current Limit Amplifier Negative Input.
When used, CL
–
is connected to the output capacitor side
of the current + sense resistor and CL
+
is connected to the
inductor side of the current sense resistor.
V
CC
(Pin 13):
Supply of the IC. For proper bypassing, a low
ESR capacitor is required.
PGND (Pin 14):
Ground of the Bottom Side N-Channel
MOSFET Driver.
BGATE (Pin 15):
Bottom Side N-Channel MOSFET Driver.
GBIAS (Pin 16):
8V Regulator Output for Boostrapping
V
BOOST
.
A bypass capacitor of at least 2
μ
F is needed.
Exposed Pad (Pin 17):
Connect to PGND (Pin 14).
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