參數(shù)資料
型號: 25LC128
廠商: Microchip Technology Inc.
英文描述: 128K 5.0V SPI Bus Serial EEPROM(2.5~5.5V,128K位,SPI總線串行EEPROM)
中文描述: 128K的5.0V SPI總線串行EEPROM(2.5?5.5V的,128K的位和SPI總線串行EEPROM的)
文件頁數(shù): 81/170頁
文件大?。?/td> 4191K
代理商: 25LC128
2003 Microchip Technology Inc.
Preliminary
DS40300C-page 79
PIC16F62X
Steps to follow when setting up an Asynchronous
Reception:
1.
Initialize the SPBRG register for the appropriate
baud rate. If a high speed baud rate is desired,
set bit BRGH. (Section 12.1).
2.
Enable the asynchronous serial port by clearing
bit SYNC, and setting bit SPEN.
3.
If interrupts are desired, then set enable bit
RCIE.
4.
If 9-bit reception is desired, then set bit RX9.
5.
Enable the reception by setting bit CREN.
6.
Flag bit RCIF will be set when reception is
complete and an interrupt will be generated if
enable bit RCIE was set.
7.
Read the RCSTA register to get the ninth bit (if
enabled) and determine if any error occurred
during reception.
8.
Read the 8-bit received data by reading the
RCREG register.
9.
If any error occurred, clear the error by clearing
enable bit CREN.
TABLE 12-7:
REGISTERS ASSOCIATED WITH ASYNCHRONOUS RECEPTION
Address
Name
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Value on
POR
Value on
all other
RESETS
0Ch
PIR1
EEIF
CMIF
RCIF
TXIF
CCP1IF TMR2IF TMR1IF
0000 -000 0000 -000
FERR
OERR
RX9D
18h
RCSTA
SPEN
RX9
SREN
CREN
ADEN
0000 -00x 0000 -00x
0000 0000 0000 0000
1Ah
RCREG USART Receive Register
8Ch
PIE1
EEIE
CMIE
RCIE
TXIE
CCP1IE TMR2IE TMR1IE
0000 -000 0000 -000
BRGH
TRMT
TX9D
98h
TXSTA
CSRC
TX9
TXEN
SYNC
0000 -010 0000 -010
0000 0000 0000 0000
99h
Legend:
x
= unknown,
-
= unimplemented locations read as '0'. Shaded cells are not used for Asynchronous Reception.
SPBRG Baud Rate Generator Register
相關(guān)PDF資料
PDF描述
25C256 256K 5.0V SPI Bus Serial EEPROM(4.5~5.5V,256K位,SPI總線串行EEPROM)
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