參數(shù)資料
型號(hào): 25LC128
廠商: Microchip Technology Inc.
英文描述: 128K 5.0V SPI Bus Serial EEPROM(2.5~5.5V,128K位,SPI總線串行EEPROM)
中文描述: 128K的5.0V SPI總線串行EEPROM(2.5?5.5V的,128K的位和SPI總線串行EEPROM的)
文件頁數(shù): 56/170頁
文件大?。?/td> 4191K
代理商: 25LC128
PIC16F62X
DS40300C-page 54
Preliminary
2003 Microchip Technology Inc.
9.1
Comparator Configuration
There are eight modes of operation for the
comparators. The CMCON register is used to select
the mode. Figure 9-1 shows the eight possible modes.
The TRISA register controls the data direction of the
comparator pins for each mode. If the Comparator
mode is changed, the comparator output level may not
be valid for the specified mode change delay shown
in Table 17-1.
FIGURE 9-1:
COMPARATOR I/O OPERATING MODES
Note:
Comparator interrupts should be disabled
during a Comparator mode change other-
wise a false interrupt may occur.
C1
RA0/AN0
V
IN
-
V
IN
+
RA3/AN3/CMP1
Comparators Reset (POR Default Value)
CM2:CM0 = 000
A
A
C2
RA1/AN1
V
IN
-
V
IN
+
RA2/AN2
A
A
C1
RA0/AN0
V
IN
-
V
IN
+
RA3/AN3/CMP1
Two Independent Comparators
CM2:CM0 = 100
A
A
C2
RA1/AN1
V
IN
-
V
IN
+
RA2/AN2
A
A
C1
RA0/AN0
V
IN
-
V
IN
+
RA3/AN3/CMP1
Two Common Reference Comparators
CM2:CM0 = 011
A
D
C2
RA1/AN1
V
IN
-
V
IN
+
RA2/AN2
A
A
C1
RA0/AN0
V
IN
-
V
IN
+
RA3/AN3/CMP1
Off (Read as '0')
One Independent Comparator
CM2:CM0 = 101
D
D
C2
RA1/AN1
V
IN
-
V
IN
+
RA2/AN2
A
A
C1
V
IN
-
V
IN
+
Off (Read as '0')
Comparators Off
CM2:CM0 = 111
D
D
C2
V
IN
-
V
IN
+
Off (Read as '0')
D
D
C1
RA0/AN0
V
IN
-
V
IN
+
RA3/AN3/CMP1
Four Inputs Multiplexed to Two Comparators
CM2:CM0 = 010
A
A
C2
RA1/AN1
V
IN
-
V
IN
+
RA2/AN2
A
A
From V
REF
Module
CIS = 0
CIS = 1
CIS = 0
CIS = 1
C1
RA0/AN0
V
IN
-
V
IN
+
RA3/AN3/CMP1
Two Common Reference Comparators with Outputs
CM2:CM0 = 110
A
D
C2
RA1/AN1
V
IN
-
V
IN
+
RA2/AN2/CMP2
A
A
Open Drain
D = Digital Input.
CIS (CMCON<3>) is the Comparator Input Switch.
RA4/T0CKI/C20
C1
RA0/AN0
V
IN
-
V
IN
+
RA3/AN3/CMP1
Three Inputs Multiplexed to Two Comparators
CM2:CM0 = 001
This mode is disfunctional and has been corrected in the ‘A’
Revision Devices.
A
A
C2
RA1/AN1
V
IN
-
V
IN
+
RA2/AN2
A
A
CIS = 0
CIS = 1
V
SS
V
SS
RA0/AN0
RA3/AN3/CMP1
RA1/AN1
RA2/AN2
C1V
OUT
C2V
OUT
C1V
OUT
C2V
OUT
Off (Read as '0')
Off (Read as '0')
C2V
OUT
C1V
OUT
C2V
OUT
C1V
OUT
C2V
OUT
C1V
OUT
C2V
OUT
A = Analog Input, port reads zeros always.
+
+
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