- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄371398 > 24LC21-P (Microchip Technology Inc.) Connector; Leaded Process Compatible:Yes; Peak Reflow Compatible (260 C):Yes PDF資料下載
參數(shù)資料
| 型號(hào)： | 24LC21-P |
| 廠商： | Microchip Technology Inc. |
| 英文描述： | Connector; Leaded Process Compatible:Yes; Peak Reflow Compatible (260 C):Yes |
| 中文描述： | 一千2.5V的雙模式的I 2 C串行EEPROM |
| 文件頁數(shù)： | 8/12頁 |
| 文件大?。?/td> | 81K |
| 代理商： | 24LC21-P |
24LC21
DS21095F-page 8
1996 Microchip Technology Inc.
FIGURE 4-2:
PAGE WRITE
S
P
BUS ACTIVITY
MASTER
SDA LINE
BUS ACTIVITY
S
T
A
R
T
CONTROL
BYTE
WORD
ADDRESS (n)
DATA n
DATA n + 15
S
T
O
P
A
C
K
A
C
K
A
C
K
A
C
K
A
C
K
DATA n + 1
VCLK
5.0
ACKNOWLEDGE POLLING
Since the device will not acknowledge during a write
cycle, this can be used to determine when the cycle is
complete (this feature can be used to maximize bus
throughput). Once the stop condition for a write com-
mand has been issued from the master, the device ini-
tiates the internally timed write cycle. ACK polling can
be initiated immediately. This involves the master send-
ing a start condition followed by the control byte for a
write command (R/W = 0). If the device is still busy with
the write cycle, then no ACK will be returned. If the
cycle is complete, then the device will return the ACK
and the master can then proceed with the next read or
write command. See Figure 5-1 for the flow diagram.
FIGURE 5-1:
ACKNOWLEDGE POLLING
FLOW
6.0
WRITE PROTECTION
When using the 24LC21 in the Bi-Directional Mode, the
VCLK pin operates as the write protect control pin. Set-
ting VCLK high allows normal write operations, while
setting VCLK low prevents writing to any location in the
array. Connecting the VCLK pin to V
SS
would allow the
24LC21 to operate as a serial ROM, although this con-
figuration would prevent using the device in the Trans-
mit-Only Mode.
Send
Write Command
Send Stop
Condition to
Initiate Write Cycle
Send Start
Send Control Byte
with R/W = 0
Did Device
Acknowledge
(ACK = 0)
Next
Operation
NO
YES
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| 24LC21-SN | 1K 2.5V Dual Mode I 2 C Serial EEPROM |
| 24LC21A | 1K 2.5V Dual Mode I 2 C Serial EEPROM |
| 24LC21A-IP | 1K 2.5V Dual Mode I 2 C Serial EEPROM |
| 24LC21A-ISN | 1K 2.5V Dual Mode I 2 C Serial EEPROM |
| 24LC21A-P | 1K 2.5V Dual Mode I 2 C Serial EEPROM |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| 24LC21T/SN | 功能描述:電可擦除可編程只讀存儲(chǔ)器 2.5V Dual Mode RoHS:否 制造商:Atmel 存儲(chǔ)容量:2 Kbit 組織:256 B x 8 數(shù)據(jù)保留:100 yr 最大時(shí)鐘頻率:1000 KHz 最大工作電流:6 uA 工作電源電壓:1.7 V to 5.5 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:SOIC-8 |
| 24LC21T-I/SN | 功能描述:電可擦除可編程只讀存儲(chǔ)器 2.5V Dual Mode RoHS:否 制造商:Atmel 存儲(chǔ)容量:2 Kbit 組織:256 B x 8 數(shù)據(jù)保留:100 yr 最大時(shí)鐘頻率:1000 KHz 最大工作電流:6 uA 工作電源電壓:1.7 V to 5.5 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:SOIC-8 |
| 24LC22A-I/P | 功能描述:電可擦除可編程只讀存儲(chǔ)器 VESA E-EDID RoHS:否 制造商:Atmel 存儲(chǔ)容量:2 Kbit 組織:256 B x 8 數(shù)據(jù)保留:100 yr 最大時(shí)鐘頻率:1000 KHz 最大工作電流:6 uA 工作電源電壓:1.7 V to 5.5 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:SOIC-8 |
| 24LC22A-I/PG | 功能描述:電可擦除可編程只讀存儲(chǔ)器 VESA E-EDID Lead Free Package RoHS:否 制造商:Atmel 存儲(chǔ)容量:2 Kbit 組織:256 B x 8 數(shù)據(jù)保留:100 yr 最大時(shí)鐘頻率:1000 KHz 最大工作電流:6 uA 工作電源電壓:1.7 V to 5.5 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:SOIC-8 |
| 24LC22A-I/SN | 功能描述:電可擦除可編程只讀存儲(chǔ)器 VESA E-EDID RoHS:否 制造商:Atmel 存儲(chǔ)容量:2 Kbit 組織:256 B x 8 數(shù)據(jù)保留:100 yr 最大時(shí)鐘頻率:1000 KHz 最大工作電流:6 uA 工作電源電壓:1.7 V to 5.5 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:SOIC-8 |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。