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參數(shù)資料
| 型號(hào)： | 24C44 |
| 英文描述： | 256-Bit Serial Nonvolatile CMOS Static RAM |
| 中文描述： | 256位串行非易失性的CMOS靜態(tài)RAM |
| 文件頁(yè)數(shù)： | 2/8頁(yè) |
| 文件大小： | 44K |
| 代理商： | 24C44 |
2
CAT24C44
Doc. No. 25019-0A 2/98 N-1
POWER-UP TIMING
(4)
Symbol
Parameter
Min.
Max.
Units
VCCSR
V
CC
Slew Rate
0.5
0.005
V/m
t
pur
Power-Up to Read Operations
200
μ
s
t
puw
Power-Up to Write or Store Operation
5
ms
MODE SELECTION
(1)(2)
Software
Instruction
Write Enable
Latch
Previous Recall
Latch
Mode
STORE
1
RECALL
0
Hardware Recall
(3)
NOP
X
X
Software Recall
1
1
RCL
X
X
Hardware Store
(3)
0
1
NOP
SET
TRUE
Software Store
1
1
STO
SET
TRUE
X = Don’t Care
BLOCK DIAGRAM
5157 FHD F09
ROW
DECODE
INSTRUCTION
REGISTER
COLUMN
DECODE
E
2
PROM ARRAY
STORE
RECALL
STATIC RAM
ARRAY
256-BIT
STORE
RECALL
CE
DI
SK
INSTRUCTION
DECODE
4-BIT
COUNTER
CONTROL
LOGIC
VCC
VSS
DO
Note:
(1) The store operation has priority over all the other operations.
(2) The store operation is inhibited when V
CC
is below
≈
3.5V.
(3) NOP designates that the device is not currently executing an instruction.
(4) This parameter is tested initially and after a design or process change that affects the parameter.
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