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參數(shù)資料
| 型號： | 24C02 |
| 廠商： | Microchip Technology Inc. |
| 英文描述： | 24C01C-P 24C01C-IP 24C01C-EP 24C01C-SN 24C01C-ISN 24C01C-ESN 24C01C-ST 24C01C-IST 24C01C-EST |
| 中文描述： | 24C01C磷24C01C的IP 24C01C -內(nèi)啡肽24C01C錫24C01C，無法真正傳達24C01C - ESN的24C01C ST段24C01C -北京時間24C01C -學報 |
| 文件頁數(shù)： | 3/12頁 |
| 文件大?。?/td> | 174K |
| 代理商： | 24C02 |
24C02C
1999 Microchip Technology Inc.
DS21202C-page 3
TABLE 1-3:
AC CHARACTERISTICS
FIGURE 1-1:
BUS TIMING DATA
All parameters apply across the specified oper-
ating ranges unless otherwise noted.
Vcc = 4.5V to 5.5V
Commercial (C):
Industrial (I):
Automotive (E):
Tamb
>
+85
°C
Tamb = 0°C to +70°C
Tamb = -40°C to +85°C
Tamb = -40°C to +125°C
Parameter
Symbol
-40°C
≤
Tamb
≤
+85°C
Units
Remarks
Min.
—
4000
4700
—
—
4000
Max.
100
—
—
1000
300
—
Min.
—
600
1300
—
—
600
Max.
400
—
—
300
300
—
Clock frequency
Clock high time
Clock low time
SDA and SCL rise time
SDA and SCL fall time
START condition hold time
F
CLK
T
HIGH
T
LOW
T
R
T
F
T
HD
:
STA
kHz
ns
ns
ns
ns
ns
(Note 1)
(Note 1)
After this period the first
clock pulse is generated
Only relevant for repeated
START condition
(Note 2)
START condition setup time
T
SU
:
STA
4700
—
600
—
ns
Data input hold time
Data input setup time
STOP condition setup time
Output valid from clock
Bus free time
T
HD
:
DAT
T
SU
:
DAT
T
SU
:
STO
T
AA
T
BUF
0
—
—
—
0
—
—
—
900
—
ns
ns
ns
ns
ns
250
4000
—
4700
100
600
—
1300
3500
—
(Note 2)
Time the bus must be free
before a new transmission
can start
(Note 1), C
B
≤
100 pF
Output fall time from V
IH
minimum to V
IL
maximum
Input filter spike suppression
(SDA and SCL pins)
Write cycle time
Endurance
T
OF
—
250
20 + 0.1 C
B
250
ns
T
SP
—
50
—
50
ns
(Note 3)
T
WR
—
1M
1.5
—
—
1M
1
—
ms
Byte or Page mode
cycles 25°C, V
CC
= 5.0V, Block
Mode (Note 4)
Note 1:
Not 100% tested. C
B
= total capacitance of one bus line in pF.
2:
As a transmitter, the device must provide an internal minimum delay time to bridge the undefined region
(minimum 300 ns) of the falling edge of SCL to avoid unintended generation of START or STOP conditions.
3:
The combined T
SP
and V
HYS
specifications are due to Schmitt trigger inputs which provide improved noise
spike suppression. This eliminates the need for a TI specification for standard operation.
4:
This parameter is not tested but guaranteed by characterization. For endurance estimates in a specific appli-
cation, please consult the Total Endurance Model which can be obtained on our website.
SCL
SDA
IN
T
SU
:
STA
SDA
OUT
T
HD
:
STA
T
LOW
T
HIGH
T
R
T
BUF
T
AA
T
HD
:
DAT
T
SU
:
DAT
T
SU
:
STO
T
SP
T
F
This Material Copyrighted by Its Respective Manufacturer
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| 24C02SC-S08 | 24C01C-P 24C01C-IP 24C01C-EP 24C01C-SN 24C01C-ISN 24C01C-ESN 24C01C-ST 24C01C-IST 24C01C-EST |
| 24C02SCS | 5V High-Speed RS-232 Transceivers with 0.1uF Capacitors |
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| 24C02/P | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
| 24C02-2P | 制造商:Integrated Silicon Solution Inc 功能描述: |
| 24C02A | 制造商:MICROCHIP 制造商全稱:Microchip Technology 功能描述:1K/2K/4K 5.0V I 2 C O Serial EEPROMs |
| 24C02A/J | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:I2C Serial EEPROM |
| 24C02A/P | 制造商:Microchip Technology Inc 功能描述:Serial EEPROM, 256 x 8, 8 Pin, Plastic, DIP |
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