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參數(shù)資料
| 型號： | 24404A |
| 英文描述： | AMD PowerNow!? Technology Platform Design Guide Application Note AMD PowerNow! Technology White Paper |
| 中文描述： | AMD的PowerNow！？技術(shù)平臺設(shè)計指南應(yīng)用筆記的AMD PowerNow！技術(shù)白皮書 |
| 文件頁數(shù)： | 11/18頁 |
| 文件大小： | 392K |
| 代理商： | 24404A |
Software Control
7
24404A/0—November 2000
AMD PowerNow! Technology Dynamically Manages Power and Performance
Preliminary Information
Real-Time Operating System Environments
In the RTOS environment, AMD PowerNow! technology is
supported through the operating system (OS) and/or BIOS. The
RTOS or BIOS carries the burden of invoking the EPM Stop
Grant State and reading and writing to the EPMR and the EPM
16-Byte I/O block. Additionally, locking the processor from
external interruption, writes, or snoops during the
AMD PowerNow! technology transition is handled
automatically.
Microsoft
Operating Systems
In Microsoft operating systems, AMD PowerNow! technology
state changes are invoked by a System Management Mode
(SMM) handler. SMM is the control vehicle for safely accessing
the EPMR and EPM 16-byte I/O block to control the processor’s
operating voltage and frequency.
The key benefit of using SMM while changing the state of the
processors' operation is that, in a Microsoft operating system,
SMM provides full access to the processor, while locking out
external accesses that could interrupt a successful transition.
This is easily done in SMM by setting the Advanced
Configuration and Power Management Interface (ACPI)
defined ARB-DIS bit to prevent PCI/AGP bus master access
while modifying model-specific register (MSR) bits.
Designing a System Enabled with AMD PowerNow! Technology is Easy
RTOS control and support are provided.
Driver for Microsoft operating system support is provided.
AMD PowerNow! technology state changes are handled
directly through software control.
AMD PowerNow! technology driver for Microsoft
operating
system invokes SMM handler for state transitions through
the SMI command port.
Internal bit values reflect voltage and bus multiplier values
invoked in EPM Stop Grant State.
EPM Stop Grant State timer ensures stable supply voltage
and Phase Locked Loop (PLL) frequency. (Maximum
duration for stable operation is 200
m
s.)
Processor automatically returns to normal operation upon
exiting EPM Stop Grant State.
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