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| 型號(hào)： | 21582 |
| 英文描述： | Gigabit Ethernet Physical Layer GigaPHY-SD Device Design Considerations? 49.2KB (PDF) |
| 中文描述： | 千兆以太網(wǎng)物理層GigaPHY - SD設(shè)備設(shè)計(jì)考慮？ 49.2KB（PDF格式） |
| 文件頁數(shù)： | 4/8頁 |
| 文件大小： | 49K |
| 代理商： | 21582 |
4
Design Considerations for the Am79761 Gigabit Ethernet Physical Layer GigaPHY-SD Device
Figure 4.
Termination Example: 150-
Differential
Fiber Optic Module Termination
Many customers wish to use Gigabit Ethernet over fiber
optic cable for increased distance, reduced EMI, or
other reasons. In general, this is a 50-
However, each vendor of fiber optic transceivers may
have slightly unique interfacing requirements, so it is
recommended that the user contact the vendor prior to
design. For the purposes of this example, a circuit
application.
which interfaces to Finisar’s FTR-8510 and Methode’s
MTR-8510 800 nm transceiver module is described.
No AC-coupling capacitors are required on the transmit
side, so only 180-
pull-down resistors are provided.
This application example assumes short traces (less
than 2 inches), so that termination resistors are not re-
quired at the end of the traces on the transmit side. On
the receive side, the normal 51.1-
capacitor is provided. This is illustrated in Figure 5.
and AC-coupling
Figure 5.
Termination Example: Fiber Optic Transceiver
PREVENTING OSCILLATIONS
Since a link can be disconnected or a transmitter can
be disabled, there are times when the receiver’s in-
puts might not carry a valid signal. In the absence of
a signal, both inputs of the receiver (RX
their internally determined bias points which are, by
design, identical. When a differential input buffer’s in-
puts are identical, the buffer is susceptible to oscilla-
tions which could cause noise within the receiver.
AMD’s input buffers do not oscillate normally; how-
ever, in a noisy environment oscillations may occur. To
prevent this problem, a Thevenin-equivalent resistor
pair is used to both terminate the transmission line
and provide a small DC offset to the receiver. This off-
set is kept as low as possible so as not to introduce an
offset under normal conditions, which might add to the
±
) will be at
input jitter seen by the receiver. An example of this is
shown in Figure 6 with values for both 50-
impedance applications.
Unused Inputs
In many applications the receiver inputs might not be
used. In this situation, it is important to terminate the in-
puts so that they will not oscillate. In a single-ended ap-
plication, the unused receiver input is AC-coupled to
ground to reduce noise susceptibility, but the input at
the internal bias point is kept. If the differential inputs
are not used, then the circuit shown below is recom-
mended. A variety of useful circuits may be used for
this purpose, but two considerations are as follows: (1)
provide a DC-offset and (2) provide a low-impedance
noise attenuation path.
and 75-
TX
RX
150-
Twinax
C1
R1
C2
R2
C3
C4
R1=R2=267
, 1%
C1=C2=C3=C4=0.01
μ
F
R3=150
, 1%
R3
DB-9
5
9
DB-9
1
6
21582B-4
TX
RX
R1
R2
C1
R3
C2
R1=R2=182
, 1%
C1=C2 = 0.01
μ
F
R3, R4=51.1
, 1%
O/E Module
TX+
TX–
RX+
RX–
7
8
22
23
R4
21582B-5
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