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21050 PCI-to-PCI Bridge Hardware Implementation
Application Note
9
When the 21050 detects a Type 1 configuration transaction for a device connected to the secondary
interface of the bridge, the 21050 translates the Type 1 transaction into a Type 0 transaction on the
downstream interface. Instead of using IDSEL to identify the target of a configuration transaction,
the Type 1 configuration format uses a 5-bit field at bits <15:11> in the address as a device number.
A device number in the Type 1 format is translated by the 21050 into an IDSEL line for Type 0
transactions on the target interface.
As required by the
PCI-to-PCI Bridge Architecture Specification
, the 21050 uses s_ad<31:16> as
secondary IDSEL lines. The 21050 uses the mapping shown in
Table 1
for translation of a device
number to an s_ad pin. The 21050 supports mapping for device numbers 0 through F (hex).
Configuration transactions with device numbers outside of this range are still forwarded, but no
IDSEL mapping is performed (s_ad<31:16> are 00h).
When implementing the 21050 in a system, each PCI device and PCI slot connected to the
secondary PCI bus must have its IDSEL line connected to one of the s_ad<31:16> lines. To reduce
the capacitive load on the s_ad line, this connection can be done through a 1K resistor, as shown in
Figure 1
. The 21050 supports address stepping on the address cycle of Type 0 transactions to allow
additional time for the IDSEL signal to become valid when resistively coupled. This is the only
time that the 21050 uses stepping, because the value of the IDSEL for data cycles and other
transaction types is not important. If you think that the s_ad bus can support the additional
capacitive load of the IDSEL pin, then you do not have to use the resistor.
When assigning secondary AD signals to secondary IDSEL signals on an expansion card, make
sure that the device numbers are consistent with the required interrupt binding given in
Table 2
.
Table 1. Device Number to Secondary IDSEL Mapping
Device Number p_ad<15:11>
Secondary IDSEL s_ad<31:16>
00000
0000 0000 0000 0001
00001
0000 0000 0000 0010
00010
0000 0000 0000 0100
00011
0000 0000 0000 1000
00100
0000 0000 0001 0000
00101
0000 0000 0010 0000
00110
0000 0000 0100 0000
00111
0000 0000 1000 0000
01000
0000 0001 0000 0000
01001
0000 0010 0000 0000
01010
0000 0100 0000 0000
01011
0000 1000 0000 0000
01100
0001 0000 0000 0000
01101
0010 0000 0000 0000
01110
0100 0000 0000 0000
01111
1000 0000 0000 0000
10000–11110
0000 0000 0000 0000
11111
0000 0000 0000 0000 if p_ad<7:2> > 00h
Generate special cycle if p_ad<7:2> = 00h