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參數資料
| 型號： | 20747 |
| 英文描述： | Using a PCMCIA Card as a Boot ROM on an ?lanSC300 Microcontroller Design ?lanSC300/?lanSC310 ISA Bus Anomalies |
| 中文描述： | 以此為啟動ROM上？lanSC300微控制器設計？lanSC300 /？lanSC310 ISA總線異常一個PCMCIA卡 |
| 文件頁數： | 3/3頁 |
| 文件大小： | 38K |
| 代理商： | 20747 |
élanSC300 and élanSC310 Devices’ ISA Bus Anomalies
3
ISA ADDRESS HOLD TIME ISSUE
(B3 SILICON)
The ISA address signals (SA23:0) have no hold time
from the Read command going inactive. This can be
seen in the élanSC300 and SC310 microcontroller
data sheet in any of the ISA bus timing diagrams for the
IOR and MEMR accesses to 8- and 16-bit devices.
This issue will not affect the data being read. The
élanSC300 and SC310 microcontrollers latch in the
data from the data bus shortly before deasserting the
command. This could potentially cause problems with
ISA devices that have read destructive registers (i.e.,
registers that are cleared on reading). There is a small
possibility that, when reading a register in an ISA de-
vice, the device will see an alternate register being
read for a very short time at the end of the Read cycle.
If this alternate register is read destructive, it could pos-
sibly be changed or cleared.
Note:
This is documented as Errata #EB41 which is
corrected on Rev-B4 silicon of the
élan
SC300 and
élan
SC310 microcontrollers.
LMEG ISSUE
On a standard ISA bus there are two sets of memory
commands: MEMR and MEMW that toggle for all mem-
ory accesses and SMEMR and SMEMW that toggle
only for memory accesses in the lowest one megabyte
of memory (address SA23:20 are all zero).
The MEMR and MEMW signals that come out of the
élanSC300 and SC310 devices are MEMR and
MEMW, not SMEMR and SMEMW. In Full ISA mode
the LMEG (Low MEGabyte) signal is available, and it
will assert for accesses in the low megabyte. LMEG
can be qualified on the system board with MEMR and
MEMW to generate SMEMR and SMEMW if they are
necessary for the design.
There is an anomaly associated with the LMEG signal
that makes it potentially unusable. When the MMS
logic is used in the élanSC300 and SC310 microcon-
trollers,
the LMEG signal will assert on an MMS hit,
even though external to the élanSC300 and SC310 de-
vice the access is to memory above the lowest mega-
byte. This could result in the ISA device that uses
SMEMR and SMEMW responding to cycles that are in-
tended for another device.
Summary
: LMEG should not be used to generate
SMEMR or SMEMW. Instead, the address lines
SA23:20 should be decoded.
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