參數(shù)資料
型號(hào)： 1894-40KLFT
廠商： INTEGRATED DEVICE TECHNOLOGY INC
元件分類： 網(wǎng)絡(luò)接口
英文描述： DATACOM, INTERFACE CIRCUIT, QCC40
封裝： 6 X 6 MM, ROHS COMPLIANT, QFN-40
文件頁(yè)數(shù)： 6/52頁(yè)
文件大?。?/td> 459K
代理商： 1894-40KLFT
ICS1894-40
10BASE-T/100BASE-TX INTEGRATED PHYCEIVER WITH RMII INTERFACE
PHYCEIVER
IDT / ICS 10BASE-T/100BASE-TX INTEGRATED PHYCEIVER WITH RMII INTERFACE 14
ICS1894-40
REV C 092909
Pins for Monitoring the Data Link table
Note:
1. During either a power-on reset or a hardware reset, each
multi-function configuration pin is an input that is sampled
when the ICS1894-40 exits the reset state. After sampling is
complete, these pins are output pins that can drive status
LEDs.
2. A software reset does not affect the state of a
multi-function configuration pin. During a software reset, all
multi-function configuration pins are outputs.
3. Each multi-function configuration pin must be pulled
either up or down with a resistor to establish the address of
the ICS1894-40. LEDs may be placed in series with these
resistors to provide a designated status indicator as
described in the Pins for Monitoring the Data Link table. Use
1K
resistors.
Caution: All pins listed in the Pins for Monitoring the Data
Link table must not float.
4. As outputs, the asserted state of a multi-function
configuration pin is the inverse of the sense sampled during
reset. This inversion provides a signal that can illuminate an
LED during an asserted state. For example, if a
multi-function configuration pin is pulled down to ground
through an LED and a current-limiting resistor, then the
sampled sense of the input is low. To illuminate this LED for
the asserted state, the output is driven high.
5. Adding 10K
resistors across the LEDs ensures the PHY
address is fully defined during slow VDD power-ramp
conditions.
6. PHY address 00 tri-states the MII interface. (Do not select
PHY address 00 unless you want the MII tri-stated.)
The following figure shows typical biasing and LED connections for the ICS1894-40.
This circuit decodes to PHY address = 1
Pin
LED Driven by the Pin’s Output Signal
P0AC
AC (Link Activity) LED
P1CL
CL (Collisions) LED
P2LI
LI (Link Integrity) LED
P3TD
TD (Transmit Data) LED
P4RD
RD (Receive Data) LED
ICS1894CK-40
10K
38
19
12
40
39
P4/LED2
P3/RXD2
P2//INT
P1/LED1
P0/LED0
INT
RXD2
10K
LED2
1K
10K
LED0
1K
10K
VDD
LED1
1K
10K
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