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參數(shù)資料
| 型號(hào)： | 16F877 |
| 廠商： | Microchip Technology Inc. |
| 英文描述： | CAT 5E CROSSOVER PATCH CORD CABLE GREEN 20 FT |
| 中文描述： | 28/40-pin 8位CMOS閃存微控制器 |
| 文件頁(yè)數(shù)： | 26/200頁(yè) |
| 文件大?。?/td> | 3544K |
| 代理商： | 16F877 |
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PIC16F87X
DS30292B-page 26
1999 Microchip Technology Inc.
2.3
PCL and PCLATH
The program counter (PC) is 13-bits wide. The low byte
comes from the PCL register, which is a readable and
writable register. The upper bits (PC<12:8>) are not
readable, but are indirectly writable through the
PCLATH register. On any reset, the upper bits of the PC
will be cleared. Figure 2-5 shows the two situations for
the loading of the PC. The upper example in the figure
shows how the PC is loaded on a write to PCL
(PCLATH<4:0>
→
PCH). The lower example in the fig-
ure shows how the PC is loaded during a
CALL
or
GOTO
instruction (PCLATH<4:3>
→
PCH).
FIGURE 2-5:
LOADING OF PC IN
DIFFERENT SITUATIONS
2.3.1
COMPUTED GOTO
A computed
GOTO
is accomplished by adding an offset
to the program counter (
ADDWF PCL
). When doing a
table read using a computed
GOTO
method, care
should be exercised if the table location crosses a PCL
memory boundary (each 256 byte block). Refer to the
application note,
“Implementing a Table Read"
(AN556).
2.3.2
STACK
The PIC16CXX family has an 8-level deep x 13-bit wide
hardware stack. The stack space is not part of either
program or data space and the stack pointer is not
readable or writable. The PC is PUSHed onto the stack
when a
CALL
instruction is executed or an interrupt
causes a branch. The stack is POPed in the event of a
RETURN,RETLW
or a
RETFIE
instruction execution.
PCLATH is not affected by a
PUSH
or
POP
operation.
The stack operates as a circular buffer. This means that
after the stack has been PUSHed eight times, the ninth
push overwrites the value that was stored from the first
push. The tenth push overwrites the second push (and
so on).
2.4
Program Memory Paging
PIC16CXX devices are capable of addressing a contin-
uous 8K word block of program memory. The
CALL
and
GOTO
instructions provide only 11 bits of address to
allow branching within any 2K program memory page.
When doing a
CALL
or
GOTO
instruction, the upper 2
bits of the address are provided by PCLATH<4:3>.
When doing a
CALL
or
GOTO
instruction, the user must
ensure that the page select bits are programmed so
that the desired program memory page is addressed. If
a return from a
CALL
instruction (or interrupt) is exe-
cuted, the entire 13-bit PC is popped off the stack.
Therefore, manipulation of the PCLATH<4:3> bits are
not required for the return instructions (which POPs the
address from the stack)
Example 2-1 shows the calling of a subroutine in
page 1 of the program memory. This example assumes
that PCLATH is saved and restored by the interrupt ser-
vice routine
(if interrupts are used).
EXAMPLE 2-1:
CALL OF A SUBROUTINE IN
PAGE 1 FROM PAGE 0
ORG
BCF
BSF
CALL SUB1_P1
:
:
ORG
0x900
0x500
PCLATH,4
PCLATH,3
;Select page 1 (800h-FFFh)
;Call subroutine in
;page 1 (800h-FFFh)
;page 1 (800h-FFFh)
SUB1_P1
:
:
:
RETURN
;called subroutine
;page 1 (800h-FFFh)
;return to Call subroutine
;in page 0 (000h-7FFh)
PC
12
8
7
0
5
PCLATH<4:0>
PCLATH
Instruction with
PCL as
Destination
ALU
GOTO,CALL
Opcode <10:0>
8
PC
12
11 10
0
11
PCLATH<4:3>
PCH
PCL
8
7
2
PCLATH
PCH
PCL
Note 1:
There are no status bits to indicate stack
overflow or stack underflow conditions.
2:
There are no instructions/mnemonics
called
PUSH
or
POP
. These are actions that
occur from the execution of the
CALL,
RETURN, RETLW
and
RETFIE
instruc-
tions or the vectoring to an interrupt
address.
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