參數(shù)資料
型號(hào)： 16F876
廠商： Microchip Technology Inc.
英文描述： CAT 5E CROSSOVER, GREEN 15 FT PATCH CABLE
中文描述： 28/40-pin 8位CMOS閃存微控制器
文件頁(yè)數(shù)： 89/200頁(yè)
文件大?。?/td> 3544K
代理商： 16F876
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PIC16F87X
1999 Microchip Technology Inc.
DS30292A-page 89
9.2.18.1
BUS COLLISION DURING A START
CONDITION
During a START condition, a bus collision occurs if:
a)
SDA or SCL are sampled low at the beginning of
the START condition (
Figure 9-20
).
b)
SCL is sampled low before SDA is asserted low.
(
Figure 9-21
).
During a START condition both the SDA and the SCL
pins are monitored.
If:
the SDA pin is already low
or the SCL pin is already low,
then:
the START condition is aborted,
and the BCLIF flag is set,
and the SSP module is reset to its IDLE state
(
Figure 9-20
).
The START condition begins with the SDA and SCL
pins deasserted. When the SDA pin is sampled high,
the baud rate generator is loaded from SSPADD<6:0>
and counts down to 0. If the SCL pin is sampled low
while SDA is high, a bus collision occurs, because it is
assumed that another master is attempting to drive a
data ’1’ during the START condition.
If the SDA pin is sampled low during this count, the
BRG is reset and the SDA line is asserted early
(
Figure 9-22
). If however a ’1’ is sampled on the SDA
pin, the SDA pin is asserted low at the end of the BRG
count. The baud rate generator is then reloaded and
counts down to 0. During this time, if the SCL pins are
sampled as ’0’, a bus collision does not occur. At the
end of the BRG count ,the SCL pin is asserted low.
FIGURE 9-20: BUS COLLISION DURING START CONDITION (SDA ONLY)
Note:
The reason that bus collision is not a factor
during a START condition is that no two
bus masters can assert a START condition
at the exact same time. Therefore, one
master will always assert SDA before the
other. This condition does not cause a bus
collision, because the two masters must be
allowed to arbitrate the first address follow-
ing the START condition. If the address is
the same, arbitration must be allowed to
continue into the data portion, REPEATED
START or STOP conditions.
SDA
SCL
SEN
SDA sampled low before
START condition.
SDA goes low before the SEN bit is set.
Set BCLIF,
S bit and SSPIF set because
SDA = 0, SCL = 1
SSP module reset into idle state.
SEN cleared automatically because of bus collision.
S bit and SSPIF set because
SDA = 0, SCL = 1
Set SEN, enable start
condition if SDA = 1, SCL=1
BCLIF
S
SSPIF
SSPIF and BCLIF are
cleared in software.
SSPIF and BCLIF are
cleared in software.
Set BCLIF.
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