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| 型號： | 16F84A |
| 廠商： | Microchip Technology Inc. |
| 英文描述： | CAT 5E CROSSOVER PATCH CORD CABLE BLUE 20 FT |
| 中文描述： | 18引腳閃存/ EEPROM的8位微控制器 |
| 文件頁數(shù)： | 25/124頁 |
| 文件大小： | 1322K |
| 代理商： | 16F84A |
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PIC16F8X
1998 Microchip Technology Inc.
DS30430C-page 25
5.3
I/O Programming Considerations
5.3.1
BI-DIRECTIONAL I/O PORTS
Any instruction which writes, operates internally as a
read followed by a write operation. The
BCF
and
BSF
instructions, for example, read the register into the
CPU, execute the bit operation and write the result back
to the register. Caution must be used when these
instructions are applied to a port with both inputs and
outputs defined. For example, a
BSF
operation on bit5
of PORTB will cause all eight bits of PORTB to be read
into the CPU. Then the
BSF
operation takes place on
bit5 and PORTB is written to the output latches. If
another bit of PORTB is used as a bi-directional I/O pin
(i.e., bit0) and it is defined as an input at this time, the
input signal present on the pin itself would be read into
the CPU and rewritten to the data latch of this particular
pin, overwriting the previous content. As long as the pin
stays in the input mode, no problem occurs. However,
if bit0 is switched into output mode later on, the content
of the data latch is unknown.
Reading the port register, reads the values of the port
pins. Writing to the port register writes the value to the
port latch. When using read-modify-write instructions
(i.e.,
BCF, BSF
, etc.) on a port, the value of the port pins
is read, the desired operation is done to this value, and
this value is then written to the port latch.
A pin actively outputting a Low or High should not be
driven from external devices at the same time in order
to change the level on this pin (“wired-or”, “wired-and”).
The resulting high output current may damage the chip.
5.3.2
SUCCESSIVE OPERATIONS ON I/O
PORTS
The actual write to an I/O port happens at the end of an
instruction cycle, whereas for reading, the data must be
valid at the beginning of the instruction cycle
(Figure 5-5). Therefore, care must be exercised if a
write followed by a read operation is carried out on the
same I/O port. The sequence of instructions should be
such that the pin voltage stabilizes (load dependent)
before the next instruction which causes that file to be
read into the CPU is executed. Otherwise, the previous
state of that pin may be read into the CPU rather than
the new state. When in doubt, it is better to separate
these instructions with a
NOP
or another instruction not
accessing this I/O port.
Example 5-1 shows the effect of two sequential
read-modify-write instructions (e.g.,
BCF, BSF
, etc.) on
an I/O port.
EXAMPLE 5-1:
READ-MODIFY-WRITE
INSTRUCTIONS ON AN
I/O PORT
;Initial PORT settings: PORTB<7:4> Inputs
; PORTB<3:0> Outputs
;PORTB<7:6> have external pull-ups and are
;not connected to other circuitry
;
; PORT latch PORT pins
; ---------- ---------
BCF PORTB, 7 ; 01pp ppp 11pp ppp
BCF PORTB, 6 ; 10pp ppp 11pp ppp
BSF STATUS, RP0 ;
BCF TRISB, 7 ; 10pp ppp 11pp ppp
BCF TRISB, 6 ; 10pp ppp 10pp ppp
;
;Note that the user may have expected the
;pin values to be 00pp ppp. The 2nd BCF
;caused RB7 to be latched as the pin value
;(high).
FIGURE 5-5:
SUCCESSIVE I/O OPERATION
PC
PC + 1
PC + 2
PC + 3
Q1
Q2
Q3 Q4
Q1
Q2
Q3 Q4 Q1
Q2
Q3 Q4
Q1
Q2
Q3 Q4
InstructPC
fetched
RB7:RB0
MOVWF PORTB
write to
PORTB
NOP
Port pin
sampled here
NOP
MOVF PORTB,W
Instruction
executed
MOVWF PORTB
write to
NOP
MOVF PORTB,W
T
PD
Note:
This example shows a write to PORTB
followed by a read from PORTB.
Note that:
data setup time = (0.25T
CY
- T
PD
)
where T
CY
= instruction cycle
T
PD
= propagation delay
Therefore, at higher clock frequencies,
a write followed by a read may be
problematic.
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