參數(shù)資料
型號(hào)： 16F84A
廠商： Microchip Technology Inc.
英文描述： CAT 5E CROSSOVER PATCH CORD CABLE BLUE 20 FT
中文描述： 18引腳閃存/ EEPROM的8位微控制器
文件頁(yè)數(shù)： 17/124頁(yè)
文件大?。?/td> 1322K
代理商： 16F84A
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PIC16F8X
1998 Microchip Technology Inc.
DS30430C-page 17
4.2.2.3
INTCON REGISTER
The INTCON register is a readable and writable
register which contains the various enable bits for all
interrupt sources.
FIGURE 4-1:
INTCON REGISTER (ADDRESS 0Bh, 8Bh)
Note:
Interrupt flag bits get set when an interrupt
condition occurs regardless of the state of
its corresponding enable bit or the global
enable bit, GIE (INTCON<7>).
R/W-0
GIE
bit7
R/W-0
EEIE
R/W-0
T0IE
R/W-0
INTE
R/W-0
RBIE
R/W-0
T0IF
R/W-0
INTF
R/W-x
RBIF
R
W = Writable bit
U
= Unimplemented bit,
read as ‘0’
- n = Value at POR reset
= Readable bit
bit0
bit 7:
GIE:
Global Interrupt Enable bit
1 = Enables all un-masked interrupts
0 = Disables all interrupts
Note:
For the operation of the interrupt structure, please refer to Section 8.5.
EEIE
: EE Write Complete Interrupt Enable bit
1 = Enables the EE write complete interrupt
0 = Disables the EE write complete interrupt
T0IE
: TMR0 Overflow Interrupt Enable bit
1 = Enables the TMR0 interrupt
0 = Disables the TMR0 interrupt
INTE
: RB0/INT Interrupt Enable bit
1 = Enables the RB0/INT interrupt
0 = Disables the RB0/INT interrupt
RBIE
: RB Port Change Interrupt Enable bit
1 = Enables the RB port change interrupt
0 = Disables the RB port change interrupt
T0IF
: TMR0 overflow interrupt flag bit
1 = TMR0 has overflowed (must be cleared in software)
0 = TMR0 did not overflow
INTF
: RB0/INT Interrupt Flag bit
1 = The RB0/INT interrupt occurred
0 = The RB0/INT interrupt did not occur
RBIF
: RB Port Change Interrupt Flag bit
1 = When at least one of the RB7:RB4 pins changed state (must be cleared in software)
0 = None of the RB7:RB4 pins have changed state
bit 6:
bit 5:
bit 4:
bit 3:
bit 2:
bit 1:
bit 0:
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