參數(shù)資料
型號: 100370
廠商: National Semiconductor Corporation
英文描述: Low Power Universal Demultiplexer/Decoder(低功耗通用多路分解器/譯碼器)
中文描述: 低功耗通用多路解復用器/解碼器(低功耗通用多路分解器/譯碼器)
文件頁數(shù): 1/8頁
文件大?。?/td> 144K
代理商: 100370
100370
Low Power Universal Demultiplexer/Decoder
General Description
The 100370 universal demultiplexer/decoder functions as ei-
ther a dual 1-of-4 decoder or as a single 1-of-8 decoder, de-
pending on the signal applied to the Mode Control (M) input.
In the dual mode, each half has a pair of active-LOW Enable
(E) inputs. Pin assignments for the E inputs are such that in
the 1-of-8 mode they can easily be tied together in pairs to
provide two active-LOW enables (E
1a
to E
, E
2a
to E
).
Signals applied to auxiliary inputs H
, H
and H
determine
whether the outputs are active HIGH or active LOW. In the
dual 1-of-4 mode the Address inputs are A
0a
, A
1a
and A
0b
,
A
with A
unused (i.e., left open, tied to V
or with LOW
signal applied). In the 1-of-8 mode, the Address inputs are
A
, A
1a
, A
with A
and A
1b
LOW or open. All inputs have
50 k
pulldown resistors.
Features
n
35% power reduction of the 100170
n
2000V ESD protection
n
Pin/function compatible with 100170
n
Voltage compensated operating range = 4.2V to 5.7V
Logic Symbols
Pin Names
A
na
, A
nb
E
na
, E
nb
M
H
a
Description
Address Inputs
Enable Inputs
Mode Control Input
Z
0
–Z
3
(Z
0a
–Z
3a
)
Polarity Select Input
Z
4
–Z
7
(Z
0b
–Z
3b
)
Polarity Select Input
Common Polarity
Select Input
Single 1-of-8
Data Outputs
Dual 1-of-4
Data Outputs
H
b
H
c
Z
0
–Z
7
Z
na
, Z
nb
Single 1-of 8 Application
DS100311-1
Dual 1-of-4 Application
DS100311-4
August 1998
1
1998 National Semiconductor Corporation
DS100311
www.national.com
相關PDF資料
PDF描述
100370D MB 32C 32#20 PIN PLUG
100370F MB 32C 32#20 PIN PLUG
100370PC MB 32C 32#20 PIN PLUG
100370QC MB 32C 32#20 SKT PLUG
100370QI MB 32C 32#20 SKT PLUG
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