Table 2. ELECTRICAL SPECIFICATIONS (continued) Description Screened U" />
參數(shù)資料
型號： 0W888-002-XTP
廠商： ON Semiconductor
文件頁數(shù)： 26/30頁
文件大?。?/td> 0K
描述： DSP BELASIGNA 250 AUDIO 64LFBGA
標(biāo)準(zhǔn)包裝： 1,500
系列： BelaSigna® 250
類型： 音頻處理器
應(yīng)用： 便攜式設(shè)備
安裝類型： 表面貼裝
封裝/外殼： 64-LFBGA
供應(yīng)商設(shè)備封裝： 64-LFBGA（7x7）
包裝： 帶卷 (TR)
BELASIGNA 250
http://onsemi.com
5
Table 2. ELECTRICAL SPECIFICATIONS (continued)
Description
Screened
Units
Max
Typ
Min
Conditions
Symbol
ANALOG OUTPUT STAGE
Attenuator gain tolerance
ATG
Input is –6 dB re: full scale @
1 kHz (all preamplifier gains)
1
1
dB
√
Output impedance
ROUT
Attenuator settings:
0 dB
12 dB
15 dB
18 dB
21 dB
24 dB
27 dB
30 dB
1
9
7
4
3
2
1
2
13
10
8
6
4
3
2
5
17
14
12
9
7
6
5
kW
√
Output noise
OUTN
0 dB attenuation
33
40
mV
Output dynamic range
OUTDR
Unweighted, 100 Hz to
8 kHz BW, mono
85
87
dB
Output THD+N
OUTTHDN
Unweighted, 100 Hz to
22 kHz BW, mono
70
67
dB
ANTIALIASING FILTERS (Input and Output)
Preamplifier filter cutoff frequency
Preamp not bypassed
25
kHz
Digital antialiasing filter cutoff
frequency
fs/2
Analog output cutoff frequency
25 kHz
15
25
35
kHz
12 kHz (only output filter)
9
12
15
kHz
Passband flatness
1
1
dB
Stopband attenuation
60 kHz (12 kHz cutoff)
60
dB
LOWSPEED A/D
Input voltage
Peak input voltage
0
2.0
V
√
INL
From GND to 2*VREG
10
LSB
DNL
From GND to 2*VREG
2
LSB
Maximum variation over
temperature (0_C to 50_C)
5
LSB
Sampling frequency
All channels sequentially
12.8
kHz
Channel sampling frequency
8 channels
1.6
kHz
DIGITAL PADS
Voltage level for high input
VIH
VDDC
* 0.8
VDDC
+ 0.5
(Note 6)
V
Voltage level for low input
VIL
0.3
VDDC
* 0.2
V
Input capacitance for digital pads
CIN
2
pF
Pullup resistance for digital input
pads
RUP_IN
260
kW
√
Pulldown resistance to VDDC for
digital input pads
RDOWN_IN
VDDC = 1.0 V
430
kW
VDDC = 1.25 V
260
kW
√
VDDC = 2.0 V
140
kW
3. Audio performance will be degraded below 1.05 V.
4. Measured with a = 12 dB input signal.
5. Input stage delay is inversely proportional to sampling frequency.
6. Max voltage should be limited to 2.2 V peak regardless of VDDC. Protection diodes will be enabled above this voltage.
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