參數(shù)資料
型號: 05F6928
英文描述: IC-ANALOGUE MULTIPLIER
中文描述: 集成電路模擬乘法器
文件頁數(shù): 8/12頁
文件大?。?/td> 347K
代理商: 05F6928
AD524
REV. C
–5–
Typical Characteristics–
FREQUENCY – Hz
10
100k
100
1k
10k
140
80
60
40
20
120
100
160
0
+Vs = 15V dc +
1V P/P SINEWAVE
G = 1000
G = 100
G =
10
POWER
SUPPLY
REJECTION
dB
G =
1
Figure 13. Positive PSRR vs.
Frequency
FREQUENCY – Hz
CURRENT
NOISE
SPECTRAL
DENSITY
fA/
Hz 100k
10k
0
1
10k
10
100
1k
1000
100
Figure 16. Input Current Noise
SETTLING TIME – s
020
510
15
–12 TO 12
4 TO –4
8 TO –8
12 TO –12
–8 TO 8
–4 TO 4
1%
0.1%
0.01%
1%
0.1%
0.01%
OUTPUT
STEP – V
Figure 19. Settling Time Gain = 1
Figure 22. Large Signal Pulse
Response and Settling Time
G = 10
FREQUENCY – Hz
10
100k
100
1k
10k
140
80
60
40
20
120
100
160
0
–Vs = –15V dc +
1V P/P SINEWAVE
G = 1000
G =
10
POWER
SUPPLY
REJECTION
dB
G =
1
G =
100
Figure 14. Negative PSRR vs.
Frequency
0.1 – 10Hz
VERTICAL SCALE; 1 DIVISION = 5V
Figure 17. Low Frequency Noise –
G = 1 (System Gain = 1000)
Figure 20. Large Signal Pulse
Response and Settling Time –
G =1
SETTLING TIME – s
020
510
15
–12 TO 12
4 TO –4
8 TO –8
12 TO –12
–8 TO 8
–4 TO 4
OUTPUT
STEP – V
1%
0.1%
0.01%
1%
0.1%
0.01%
Figure 23. Settling Time Gain = 100
FREQUENCY – Hz
VOLT
NSD
nV/
Hz
1000
100
0.1
1
10
100k
100
1k
10k
10
1
G = 1
G = 10
G = 100, 1000
G = 1000
Figure 15. RTI Noise Spectral
Density vs. Gain
0.1 – 10Hz
VERTICAL SCALE; 1 DIVISION = 0.1V
Figure 18. Low Frequency Noise –
G = 1000 (System Gain = 100,000)
SETTLING TIME – s
020
510
15
–12 TO 12
4 TO –4
8 TO –8
12 TO –12
–8 TO 8
–4 TO 4
1%
0.1%
0.01%
1%
0.1%
0.01%
OUTPUT
STEP – V
Figure 21. Settling Time Gain = 10
Figure 24. Large Signal Pulse
Response and Settling Time
G = 100
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