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CHAPTER 8 16-BIT TIMER/EVENT COUNTER
(2) One-shot pulse output using external trigger
If the 16-bit timer mode control register (TMC0), capture/compare control register 0 (CRC0), and the 16-bit
timer output control register (TOC0) are set as shown in Figure 8-33, a one-shot pulse is output from the TO0/
P30 pin with a TI00/P00 valid edge as an external trigger.
Any of three edge specifications can be selected —rising, falling, or both edges— as the valid edges for the
TI00/P00 pin by means of bits 2 and 3 (ES10 and ES11) of external interrupt mode register 0 (INTM0).
When a valid edge is input to the TI00/P00 pin, the 16-bit timer/event counter is cleared and started, and output
is activated by the count values set beforehand in 16-bit capture/compare register 01 (CR01). Thereafter,
output is inactivated by the count value set beforehand in 16-bit capture/compare register 00 (CR00).
Caution When outputting one-shot pulses, external trigger is ignored if generated again.
Figure 8-33. Control Register Settings for One-Shot Pulse Output Operation Using External Trigger
(a) 16-bit timer mode control register (TMC0)
(b) Capture/compare control register 0 (CRC0)
(c) 16-bit timer output control register (TOC0)
Remark
0/1: Setting 0 or 1 allows another function to be used simultaneously with one-shot pulse output.
See the description of the respective control registers for details.
Caution Values in the following range should be set in CR00 and CR01.
0000H
≤
CR01 < CR00
≤
FFFFH
TMC0
0
0
0
1
0
0
0
0
OVF0
TMC01
TMC02
TMC03
Clear & start with valid edge of TI00/P00 pin
CRC0
0
0/1
0
0
0
0
0
0
CRC00
CRC01
CRC02
CR00 is set as compare register
CR01 is set as compare register
TOC0
1
1
0/1
0/1
1
1
0
0
TOE0
TOC01
LVR0
LVS0
OSPT
OSPE TOC04
TO0 Output Enabled
Inversion of output on match of TM0 and CR00
Specified TO0 output F/F initial value
Inversion of output on match of TM0 and CR01
One-shot pulse output mode