19
5.4.2
5.4.3
5.4.4
5.4.5
5.4.6
5.4.7
5.4.8
5.4.9
Register addressing ...................................................................................................................
Direct addressing .......................................................................................................................
Short direct addressing ..............................................................................................................
Special-function register (SFR) addressing ...............................................................................
Register indirect addressing.......................................................................................................
Based addressing ......................................................................................................................
Based indexed addressing .........................................................................................................
Stack addressing........................................................................................................................
113
114
115
117
118
119
120
120
CHAPTER 6 PORT FUNCTIONS.....................................................................................................
121
6.1
6.2
Port Functions......................................................................................................................
Port Configuration ...............................................................................................................
6.2.1
Port 0..........................................................................................................................................
6.2.2
Port 1..........................................................................................................................................
6.2.3
Port 2..........................................................................................................................................
6.2.4
Port 3 (
μ
PD780024, 780034 Subseries) ....................................................................................
6.2.5
Port 3 (
μ
PD780024Y, 780034Y Subseries) ................................................................................
6.2.6
Port 4..........................................................................................................................................
6.2.7
Port 5..........................................................................................................................................
6.2.8
Port 6..........................................................................................................................................
6.2.9
Port 7..........................................................................................................................................
Port Function Control Registers ........................................................................................
Port Function Operations....................................................................................................
6.4.1
Writing to input/output port .........................................................................................................
6.4.2
Reading from input/output port...................................................................................................
6.4.3
Operations on input/output port..................................................................................................
Selection of Mask Option ....................................................................................................
121
124
124
125
126
127
129
132
133
134
135
136
140
140
140
140
141
6.3
6.4
6.5
CHAPTER 7 CLOCK GENERATOR ................................................................................................
143
7.1
7.2
7.3
7.4
Clock Generator Functions.................................................................................................
Clock Generator Configuration ..........................................................................................
Clock Generator Control Register ......................................................................................
System Clock Oscillator ......................................................................................................
7.4.1
Main system clock oscillator.......................................................................................................
7.4.2
Subsystem clock oscillator .........................................................................................................
7.4.3
Scaler .........................................................................................................................................
7.4.4
When no subsystem clocks are used.........................................................................................
7.5 Clock Generator Operations ...............................................................................................
7.5.1
Main system clock operations ....................................................................................................
7.5.2
Subsystem clock operations ......................................................................................................
7.6
Changing System Clock and CPU Clock Settings............................................................
7.6.1
Time required for switchover between system clock and CPU clock .........................................
7.6.2
System clock and CPU clock switching procedure ....................................................................
143
143
145
147
147
148
151
151
152
153
154
154
154
156