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CONTENTS
CHAPTER 1 MEMORY SPACE .................................................................................................................1
1.1 Memory Spaces....................................................................................................................1
1.2 Internal Program Memory (Internal ROM) Space ..............................................................1
1.3 Vector Table Area ................................................................................................................5
1.4 CALLT Instruction Table Area ..........................................................................................10
1.5 CALLF Instruction Entry Area ..........................................................................................10
1.6 Internal Data Memory (Internal RAM) Space ...................................................................10
1.7 Special Function Register (SFR) Area .............................................................................16
1.8 External Memory Space ....................................................................................................16
1.9 IEBus
TM
Register Area (
μ
PD78098 and 78098B Subseries Only)...................................19
CHAPTER 2 REGISTER ..........................................................................................................................21
2.1 Control Registers...............................................................................................................21
2.1.1 Program counter (PC).............................................................................................................. 21
2.1.2 Program status word (PSW) ................................................................................................... 21
2.1.3 Stack pointer (SP) .................................................................................................................... 23
2.2 General Registers ..............................................................................................................24
2.3 Special-Function Register (SFR) ......................................................................................26
CHAPTER 3 ADDRESSING.....................................................................................................................27
3.1 Instruction Address Addressing ......................................................................................27
3.1.1 Relative addressing ................................................................................................................. 27
3.1.2 Immediate addressing ............................................................................................................. 28
3.1.3 Table indirect addressing ....................................................................................................... 29
3.1.4 Register addressing ................................................................................................................ 30
3.2 Operand Address Addressing ..........................................................................................31
3.2.1 Implied addressing .................................................................................................................. 31
3.2.2 Register addressing ................................................................................................................ 32
3.2.3 Direct addressing..................................................................................................................... 33
3.2.4 Short direct addressing........................................................................................................... 34
3.2.5 Special-function register (SFR) addressing .......................................................................... 35
3.2.6 Register indirect addressing .................................................................................................. 36
3.2.7 Based addressing .................................................................................................................... 37
3.2.8 Based indexed addressing ..................................................................................................... 38
3.2.9 Stack addressing ..................................................................................................................... 39
CHAPTER 4 INSTRUCTION SET ............................................................................................................41
4.1 Operation ............................................................................................................................42
4.1.1 Operand identifiers and description methods ...................................................................... 42
4.1.2 Description of “operation” column ........................................................................................ 43
4.1.3 Description of “flag operation” column................................................................................. 43
4.1.4 Description of “clock” column ............................................................................................... 44
4.1.5 Operation list ............................................................................................................................ 45
4.1.6 Instructions listed by addressing type .................................................................................. 78