49
CHAPTER 1 GENERAL (
μ
PD78018F SUBSERIES)
1.8 Functional Outline
Part Number
Item
ROM
Mask ROM
PROM
8 KB
16 KB
24 KB
32 KB
40 KB
48 KB
60 KB
60 KB
Note 1
High-speed RAM
512 B
1024 B
1024 B
Note 1
Extension RAM
–
512 B
1024 B
1024 B
Note 2
Buffer RAM
32 B
Memory space
64 KB
General-purpose register
8 bits
×
8
×
4 banks
With main system
clock
0.4
μ
s/0.8
μ
s/1.6
μ
s/3.2
μ
s/6.4
μ
s (at 10.0 MHz)
With subsystem
clock
122
μ
s (at 32.768 kHz)
16-bit operation
Multiplication/division (8 bits
×
8 bits, 16 bits
÷
8 bits)
Bit manipulation (set, reset, test, Boolean operation)
BCD correction, etc.
Total
CMOS input
CMOS I/O
(Port lines to which internal pull-up resistor can be connected via software:
47 lines)
N-ch open drain I/O :
4 lines
(15 V, pull-up resistor can be connected by mask option to mask ROM model
only: 4 lines)
:
:
:
53 lines
2 lines
47 lines
8-bit resolution
×
8 channels
Low-voltage operation: AV
DD
= 1.8 to 5.5 V
3-wire serial I/O/SBI/2-wire serial I/O mode selectable : 1 channel
3-wire serial I/O mode
(with automatic transmit/receive function of up to 32 B): 1 channel
16-bit timer/event counter : 1 channel
8-bit timer/event counter
Watch timer
Watchdog timer
: 2 channels
: 1 channel
: 1 channel
3 lines (14-bit PWM output: 1 line)
39.1 kHz, 78.1 kHz, 156 kHz, 313 kHz, 625 kHz, 1.25 MHz
(with main system clock: 10.0 MHz)
32.768 kHz (with subsystem clock: 32.768 kHz)
2.4 kHz, 4.9 kHz, 9.8 kHz (with main system clock: 10.0 MHz)
Notes
1.
The capacities of the internal PROM and internal high-speed RAM can be changed by using memory
size select register (IMS).
2.
The capacity of the internal extension RAM can be changed by using internal extension RAM size
select register (IXS).
Timer
A/D converter
Serial interface
I/O port
Instruction set
Timer output
Clock output
Buzzer output
μ
PD78016F
μ
PD78014F
μ
PD78015F
μ
PD78013F
μ
PD78011F
μ
PD78P018F
μ
PD78012F
μ
PD78018F
Minimum
instruction
execution time
Internal
memory