19
5.4.5
5.4.6
5.4.7
5.4.8
5.4.9
5.4.10
Short direct addressing ......................................................................................................
Special function register (SFR) addressing ......................................................................
Register indirect addressing ..............................................................................................
Based addressing ...............................................................................................................
Based indexed addressing .................................................................................................
Stack addressing ................................................................................................................
126
128
129
130
131
131
CHAPTER 6 PORT FUNCTIONS ....................................................................................................
6.1
Functions of Ports ...........................................................................................................
6.2
Port Configuration ...........................................................................................................
6.2.1
Port 0...................................................................................................................................
6.2.2
Port 1...................................................................................................................................
6.2.3
Port 2 (
μ
PD78018F subseries) ..........................................................................................
6.2.4
Port 2 (
μ
PD78018FY subseries)........................................................................................
6.2.5
Port 3...................................................................................................................................
6.2.6
Port 4...................................................................................................................................
6.2.7
Port 5...................................................................................................................................
6.2.8
Port 6...................................................................................................................................
6.3
Registers Controlling Port Functions...........................................................................
6.4
Operation of Port Functions ..........................................................................................
6.4.1
Writing to I/O port ...............................................................................................................
6.4.2
Reading from I/O port.........................................................................................................
6.4.3
Arithmetic operation of I/O port..........................................................................................
6.5
Mask Option......................................................................................................................
133
133
136
137
139
140
142
144
145
146
147
149
155
155
155
155
156
CHAPTER 7 CLOCK GENERATION CIRCUIT ..............................................................................
7.1
Function of Clock Generation Circuit...........................................................................
7.2
Configuration of Clock Generation Circuit ..................................................................
7.3
Register Controlling Clock Generation Circuit ...........................................................
7.4
System Clock Oscillation Circuits.................................................................................
7.4.1
Main system clock oscillation circuit..................................................................................
7.4.2
Subsystem clock oscillation circuit ....................................................................................
7.4.3
Divider circuit ......................................................................................................................
7.4.4
When subsystem clock is not used ...................................................................................
7.5
Operation of Clock Generation Circuit .........................................................................
7.5.1
Operation of main system clock ........................................................................................
7.5.2
Operation of subsystem clock............................................................................................
7.6
Changing Setting of System Clock and CPU Clock ...................................................
7.6.1
Time required for switching between system clock and CPU clock ................................
7.6.2
Switching between system clock and CPU clock .............................................................
157
157
157
159
162
162
162
165
165
166
167
169
170
170
171
CHAPTER 8 16-BIT TIMER/EVENT COUNTER ............................................................................
8.1
Outline of Timers in
μ
PD78018F, 78018FY Subseries................................................
8.2
Functions of 16-Bit Timer/Event Counter ....................................................................
8.3
Configuration of 16-Bit Timer/Event Counter..............................................................
8.4
Registers Controlling 16-Bit Timer/Event Counter .....................................................
8.5
Operation of 16-Bit Timer/Event Counter.....................................................................
8.5.1
Operation as interval timer.................................................................................................
173
173
175
176
181
188
188