參數(shù)資料
型號(hào)： μPD780031Y
廠商： NEC Corp.
元件分類(lèi)： 8位微控制器
英文描述： 8 Bit Single Chip Microcontrollers
中文描述： 8位單片機(jī)微控制器
文件頁(yè)數(shù)： 53/66頁(yè)
文件大?。?/td> 454K
代理商： ΜPD780031Y
μ
PD780031Y, 780032Y, 780033Y, 780034Y
Preliminary Data Sheet
53
Note
Selection of 2
12
/f
X
and 2
14
/f
X
to 2
17
/f
X
is possible with bits 0 to 2 (OSTS0 to OSTS2) of the oscillation
stabilization time select register (OSTS).
Data Retention Timing (STOP Mode Release by RESET)
Parameter
Symbol
Test Conditions
MIN.
TYP.
MAX.
Unit
Resolution
10
10
10
bit
Overall error
Note
4.5 V
≤
AV
REF
≤
5.5 V
±
0.4
%
2.7 V
≤
AV
REF
<
4.5 V
±
0.7
%
Conversion time
T
CONV
4.5 V
≤
AV
REF
≤
5.5 V
14
200
μ
s
2.7 V
≤
AV
REF
<
4.5 V
20
200
μ
s
Analog input voltage
V
IAN
0
AV
REF
+ 0.3
V
Reference voltage
AV
REF
2.7
AV
DD
V
AV
REF
resistance
R
AIREF
10
20
k
A/D Converter Characteristics (T
A
= –40 to +85
°
C, V
DD
= AV
DD
= AV
REF
= 2.7 to 5.5 V, AV
SS
= V
SS
= 0 V)
Note
Overall error excluding quantization error (
±
1/2 LSB). It is indicated as a ratio to the full-scale value.
Data Memory STOP Mode Low Supply Voltage Data Retention Characteristics (T
A
= –40 to +85
°
C)
Parameter
Symbol
Test Conditions
MIN.
TYP.
MAX.
Unit
Data retention power
supply voltage
V
DDDR
1.6
5.5
V
Data retention
power supply current
I
DDDR
V
DDDR
= 1.6 V
Subsystem clock stop and feed-back resistor
disconnected
0.1
10
μ
A
Release signal set time
t
SREL
0
μ
s
Oscillation stabiliza-
tion wait time
t
WAIT
Release by RESET
2
17
/fx
ms
Release by interrupt request
Note
ms
t
SREL
t
WAIT
V
DD
RESET
STOP Instruction Execution
STOP Mode
Data Retention Mode
Internal Reset Operation
HALT Mode
Operating Mode
V
DDDR
相關(guān)PDF資料
PDF描述
μPD780032Y 8 Bit Single Chip Microcontrollers
μPD780033Y 8 Bit Single Chip Microcontrollers
μPD780034Y 8 Bit Single Chip Microcontrollers
μPD780031 8 Bit Single Chip Microcontrollers(8位單片微控制器)
μPD780032 8 Bit Single Chip Microcontrollers(8位單片微控制器)
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