μ
PD780031Y, 780032Y, 780033Y, 780034Y
Preliminary Data Sheet
12
3.1 Port Pins (2/2)
Pin Name
I/O
Function
After
Reset
Alternate
Function
P70
I/O
Input
TI00/TO0
P71
TI01
P72
TI50/TO50
P73
TI51/TO51
P74
PCL
P75
BUZ
3.2 Non-port Pins (1/2)
Pin Name
I/O
Function
After
Reset
Alternate
Function
INTP0
Input
External interrupt request input for which the valid edge (rising edge,
Input
P00
INTP1
falling edge, or both rising edge and falling edge) can be specified.
P01
INTP2
P02
INTP3
P03/ADTRG
SI30
Input
Serial interface serial data input.
Input
P20
SO30
Output
Serial interface serial data output.
Input
P21
SDA0
I/O
Serial interface serial data input/output.
Input
P32
SCK30
I/O
Serial interface serial clock input/output.
Input
P22
SCL0
P33
RxD0
Input
Serial data input for asynchronous serial interface.
Input
P23
TxD0
Output
Serial data output for asynchronous serial interface.
Input
P24
ASCK0
Input
Serial clock input for asynchronous serial interface.
Input
P25
TI00
Input
External count clock input to 16-bit timer (TM0).
Capture trigger input to capture register (CR01) of 16-bit timer (TM0).
Input
P70/TO0
TI01
Capture trigger input to capture register (CR00) of 16-bit timer (TM0).
P71
TI50
External count clock input to 8-bit timer (TM50).
P72/TO50
TI51
External count clock input to 8-bit timer (TM51).
P73/TO51
TO0
Output
16-bit timer (TM0) output.
Input
P70/TI00
TO50
8-bit timer (TM50) output (shared with 8-bit PWM output).
Input
P72/TI50
TO51
8-bit timer (TM51) output (shared with 8-bit PWM output).
P73/TI51
PCL
Output
Clock output (for trimming of main system clock and subsystem clock).
Input
P74
BUZ
Output
Buzzer output.
Input
P75
AD0 to AD7
I/O
Lower address/data bus for extending memory externally.
Input
P40 to P47
A8 to A15
Output
Higher address bus for extending memory externally.
Input
P50 to P57
RD
Output
Strobe signal output for read operation of external memory.
Input
P64
WR
Strobe signal output for write operation of external memory.
P65
WAIT
Input
Inserting wait for accessing external memory.
Input
P66
ASTB
Output
Strobe output which externally latches address information output to
port 4 and port 5 to access external memory.
Input
P67
Port 7
6-bit input/output port.
Input/output can be specified bit-wise.
When used as an input port, an on-chip pull-up resistor can be connected by
software.