參數(shù)資料
型號: μPD75P70076
廠商: NEC Corp.
英文描述: 4 Bit Single Chip Microcontrollers(4位單片微控制器)
中文描述: 4位單片微控制器(4位單片微控制器)
文件頁數(shù): 16/62頁
文件大?。?/td> 290K
代理商: ΜPD75P70076
m
PD75P0076
16
6. MEMORY CONFIGURATION
Figure 6-1. Program Memory Map
Note
Can be used only in Mk II mode.
Remark
For instructions other than those noted above, the “BR PCDE” and “BR PCXA” instructions can be used to
branch to addresses with changes in the PC’s lower 8 bits only.
MBE
MBE
MBE
MBE
MBE
MBE
MBE
RBE
RBE
RBE
RBE
RBE
RBE
RBE
Internal reset start address (upper 6 bits)
Internal reset start address (lower 8 bits)
INTBT/INT4 start address (upper 6 bits)
INTBT/INT4 start address (lower 8 bits)
INT0 start address (upper 6 bits)
INT0 start address (lower 8 bits)
INT1 start address (upper 6 bits)
INT1 start address (lower 8 bits)
INTCSI start address (upper 6 bits)
INTCSI start address (lower 8 bits)
INTT0 start address (upper 6 bits)
INTT0 start address (lower 8 bits)
INTT1 start address (upper 6 bits)
INTT1 start address (lower 8 bits)
Reference table for GETI instruction
0000H
0002H
0004H
0006H
0008H
000AH
000CH
0020H
007FH
0080H
07FFH
0800H
0FFFH
1000H
1FFFH
2000H
2FFFH
3000H
3FFFH
CALLF
!faddr instruction
entry address
Branch address for
the following instructions
BR BCDE
BR BCXA
BR !addr
BRA !addr1
CALLA !addr1
CALL !addr instruction
subroutine
entry address
BR $addr instruction
relative branch address
(–15 to –1,
+2 to +16)
BRCB
!caddr instruction
branch address
BRCB
!caddr instruction
branch address
BRCB
!caddr instruction
branch address
BRCB
!caddr instruction
branch address
Note
Note
7
6
0
Branch destination
address specified by
GETI instruction,
subroutine entry
address
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