參數(shù)資料
型號(hào): μPD75P3018A
廠商: NEC Corp.
英文描述: 4 Bit Single Chip Microcontrollers(4位單片微控制器)
中文描述: 4位單片微控制器(4位單片微控制器)
文件頁(yè)數(shù): 39/60頁(yè)
文件大?。?/td> 337K
代理商: ΜPD75P3018A
μPD75P3018A
39
AC Characteristics (T
A
= –40 to +85 °C, V
DD
= 1.8 to 5.5 V)
Parameter
Symbol
Conditions
MIN.
TYP.
MAX.
Unit
CPU clock cycle time
Note 1
t
CY
Operation with
V
DD
= 2.7 to 5.5 V
0.67
64
m
s
(minimum instruction execution
main system clock
0.95
64
m
s
time = 1 machine cycle)
Operation with subsystem clock
114
122
125
μs
TI0, TI1, TI2 input frequency
f
TI
V
DD
= 2.7 to 5.5 V
0
1.0
MHz
0
275
kHz
TI0, TI1, TI2 input high-/
t
TIH
,
t
TIL
V
DD
= 2.7 to 5.5 V
0.48
m
s
low-level
widths
1.8
m
s
Interrupt input high-/low-level
t
INTH
,
t
INTL
INT0
IM02 = 0
Note 2
m
s
widths
IM02 = 1
10
m
s
INT1, 2, 4
10
m
s
KR0-7
10
m
s
RESET low-level
width
t
RSL
10
m
s
Notes 1. The cycle time (minimum instruc-
tion execution time) of the CPU
clock (
F
) is determined by the
oscillation frequency of the
connected resonator (and
external clock), the system clock
control register (SCC), and
processor clock control register
(PCC).
The figure on the right shows the
supply voltage V
DD
vs. cycle time
t
CY
characteristics when the
device operates with the main
system clock.
2. 2t
CY
or 128/f
X
depending on the
setting of the interrupt mode
register (IM0).
Operation
guaranteed range
Supply voltage
V
DD
[V]
0
1
2
3
4
5
6
0.5
1
2
3
4
5
6
60
64
C
C
μ
s
t
CY
vs V
DD
(with main system clock)
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