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參數(shù)資料
| 型號： | μPD45D128442 |
| 廠商： | NEC Corp. |
| 英文描述： | 128 M-bit Synchronous DRAM with Double Data Rate(128 同步動態(tài)RAM) |
| 中文描述： | 128 M位同步雙數(shù)據(jù)速率（128同步動態(tài)RAM的內(nèi)存） |
| 文件頁數(shù)： | 20/80頁 |
| 文件大?。?/td> | 637K |
| 代理商： | ΜPD45D128442 |
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20
μ
PD45D128442, 45D128842, 45D128164
Preliminary Data Sheet
4.5 Command Truth Table for CKE
Current State
CKE
/CS /RAS /CAS /WE
Add
Command
Action
Notes
n-1
n
Self refresh
H
x
x
x
x
x
x
ILLEGAL(Impossible)
L
H
x
x
x
x
x
SREX
Exit S.R, self refresh recovery
2
L
L
x
x
x
x
x
Maintain self refresh
Self refresh recovery
H
H
H
x
x
x
x
DESL
Nop (Idle after t
RC
)
H
H
L
H
H
H
x
NOP
Nop (Idle after t
RC
)
H
L
x
x
x
x
x
ILLEGAL
L
x
x
x
x
x
x
ILLEGAL (Impossible)
Power down
H
x
x
x
x
x
x
ILLEGAL (Impossible)
L
H
x
x
x
x
x
PDEX
Exit power down, Idle
L
L
x
x
x
x
x
Maintain power down
All banks idle
H
H
V
V
V
V
x
Refer to operative command table
H
L
H
x
x
x
x
PWDN
Power down entry
1
H
L
L
H
H
H
x
PWDN
Power down entry
1
H
L
L
x
x
L
x
ILLEGAL
H
L
L
H
L
x
x
ILLEGAL
H
L
L
L
H
x
X
ILLEGAL
H
L
L
L
L
H
X
SELF
Self refresh entry
1
L
X
x
x
x
x
x
ILLEGAL (Impossible)
Row active
H
x
x
x
x
x
x
Refer to operative command table
L
x
x
x
x
x
x
Power down
1
Any state except
H
H
V
V
V
V
V
Refer to operative command table
listed above
H
L
x
x
x
x
x
ILLEGAL
L
x
x
x
x
x
x
ILLEGAL (Impossible)
Remark
H = High level, L = Low level, x = High or Low level (Don't care), V = Valid,
Add = Address (A0 - A11, BA0, BA1),
ILLEGAL = Device operation and/or data-integrity are not guaranteed
Notes 1.
Self refresh can be entered only from all banks idle state.
Power down can be entered only from all banks idle or row active state.
2.
CKE low to high transition will re-enable CLK and other inputs asynchronously.
A Minimum setup time must be satisfied before any command other than exit.
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