參數(shù)資料
型號: μPD42S17405L
廠商: NEC Corp.
英文描述: 16M- bit CMOS dynamic RAMs(16M CMOS 動態(tài)RAM)
中文描述: 1,600位CMOS動態(tài)存儲器(1,600的CMOS動態(tài)內(nèi)存)
文件頁數(shù): 1/36頁
文件大?。?/td> 310K
代理商: ΜPD42S17405L
MOS INTEGRATED CIRCUIT
μ
PD42S17405L, 4217405L
3.3 V OPERATION 16 M-BIT DYNAMIC RAM
4 M-WORD BY 4-BIT, EDO
The mark shows major revised points.
Document No. M10068EJ6V0DS00 (6th edition)
Date Published January 1997 N
Printed in Japan
Description
The
μ
PD42S17405L, 4217405L are 4,194,304 words by 4 bits CMOS dynamic RAMs with optional EDO.
EDO is a kind of the page mode and is useful for the read operation.
Besides, the
μ
PD42S17405L can execute CAS before RAS self refresh.
The
μ
PD42S17405L, 4217405L are packaged in 26-pin plastic TSOP (II) and 26-pin plastic SOJ.
Features
EDO (Hyper page mode)
4,194,304 words by 4 bits organization
Single +3.3 V
±
0.3 V power supply
Fast access and cycle time
Power
consumption
Active (MAX.)
Access time
(MAX.)
R/W cycle time
(MIN.)
EDO (Hyper page mode)
Part number
cycle time (MIN.)
μ
PD42S17405L-A50, 4217405L-A50
660 mW
50 ns
84 ns
20 ns
μ
PD42S17405L-A60, 4217405L-A60
360 mW
60 ns
104 ns
25 ns
μ
PD42S17405L-A70, 4217405L-A70
324 mW
70 ns
124 ns
30 ns
μ
PD42S17405L can execute CAS before RAS self refresh
Part number
Refresh cycle
Refresh
Power consumption
at standby (MAX.)
μ
PD42S17405L
2,048 cycles/128 ms
CAS before RAS self refresh
CAS before RAS refresh
RAS only refresh
Hidden refresh
0.54 mW
(CMOS level input)
μ
PD4217405L
2,048 cycles/32 ms
CAS before RAS refresh
RAS only refresh
Hidden refresh
1.8 mW
(CMOS level input)
The information in this document is subject to change without notice.
1995
DATA SHEET
相關(guān)PDF資料
PDF描述
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μPD42S17405 16 M-Bit Dynamic RAM(16M 動態(tài)RAM)
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