參數(shù)資料
型號(hào)： ZPSD513B1-20JI
英文描述： Schottky Barrier Diodes
中文描述： 肖特基勢壘二極管
文件頁數(shù)： 42/153頁
文件大?。?/td> 1036K
代理商： ZPSD513B1-20JI
PSD5XX Famly
39
There are 5 programmable 8-bit I/O ports: Port A, Port B, Port C, Port D and Port E. These
ports all have multiple operating modes, depending on the configuration. Some of the basic
functions are providing input/output for the ZPLD, the Counter/Timer, or can be used for
standard I/O. Each port pin is individually configurable, thus enabling a single 8-bit port to
perform multiple functions. The I/O ports occupy 256 bytes of memory space as defined by
“CSIOP”. Refer to the System Configuration section for I/O register address offset.
To set up the port configuration the user is required to:
1. Define I/O port chip select (CSIOP) in the ABEL file.
2. Initialize certain port configuration registers in the user’s program and/or
3. Specify the configuration in the PSD5XX PSDsoft Software.
4. Unused input pins should be tied to V
CC
or GND.
The following is a description of the operating modes of the I/O ports. The functions of the
port registers are described in later sections.
9.3.1 Standard MCUI/O
The Standard MCU I/O Mode provides additional I/O capability to the microcontroller.
In this mode, the ports can perform standard I/O functions such as sensing or controlling
various external I/O devices. Operation options of this mode are as follows:
J
Configuration
1.Declare pins or signals which are used as I/O in the ABEL file (PSDsoft).
2.Set the bit or bits in the Control Register to "1".
3.
As Output Port
– Write output data to Data Out Register
– Set Direction Register to output mode
4.
As Input Port
– Set Direction Register to input mode
– Read input from Data In Register
The port remains an output or input port as long as the Direction Register is not changed.
9.3.2 PLDI/O
The PLD I/O mode enables the port to be configured as an input to the ZPLD, or as an
output from the GPLD macrocell. The output can be tri-stated with a control signal defined
by a product term from the ZPLD. This mode is configured by the user in the PSD5XX
PSDsoft Software, and is enabled upon power up. For a detailed description, see the
section on the ZPLD.
J
Configuration
1.Declare pins or signals in the ABEL file (PSDsoft)
2.Write logic equations in the ABEL file.
3.PSDcompiler maps the PLD function to the PSD.
9.3
I/OPorts
相關(guān)PDF資料
PDF描述
ZPSD513B1-20LI Schottky Barrier Diodes
ZPSD513B1-20LM Schottky Barrier Diodes
ZPSD513B1-20U Schottky Barrier Diodes
ZPSD513B1-20UI Field-Programmable Peripheral
ZPSD513B1-70J Field-Programmable Peripheral
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
ZPSD513B1-C-15L 制造商:WSI 功能描述:
ZPSD602E1-15L 制造商:WSI 功能描述:
ZPSD611E1-15J 制造商:WSI 功能描述:
ZPSD611E1-15JI 制造商:WSI 功能描述:
ZPSD611E1-15L 制造商:WSI 功能描述:
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。

采購需求

(若只采購一條型號(hào)，填寫一行即可)

發(fā)布成功！您可以繼續(xù)發(fā)布采購。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

發(fā)布成功！您可以繼續(xù)發(fā)布采購。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

*型號(hào) *數(shù)量 廠商 批號(hào) 封裝
添加更多采購

我的聯(lián)系方式

*
*
*