參數(shù)資料
型號： ZPSD511B1
英文描述： Field Programmable Microcontroller Peripherals(可編程邏輯，零功耗，16K位SRAM,40個(gè)可編程I/O,通用PLD有61個(gè)輸入)
中文描述： 現(xiàn)場可編程微控制器外圍設(shè)備（可編程邏輯，零功耗，16K的位的SRAM，40余個(gè)可編程輸入/輸出，通用PLD的有61個(gè)輸入）
文件頁數(shù)： 45/142頁
文件大?。?/td> 786K
代理商： ZPSD511B1
ZPSD5XX Famly
7-45
Port A D Functionality and Structure
Port A is the most flexible of all the I/O ports. It can be configured to perform one or more
of the following functions:
J
Standard MCU I/O Mode
J
PLD I/O
J
Address Out – latched address lines assigned to pins PA[0-7]
J
Address In – input port for other lines, inputs can be latched by ALE.
J
Special Function Out – pins PA0 – PA3 can be configured as dedicated timer outputs.
J
Peripheral I/O
Figure 21 shows the structure of a Port A pin. If the pin is configured as an output port, the
multiplexer selects one of its four inputs as output. If the pin is configured as an input, the
input connects to :
1. Data In Register as input in Standard MCU I/O Mode
or
2. PA Macrocell as PLD input
or
3. PA Macrocell as Address In input (latched for multiplexed bus).
Port B D Functionality and Structure
Port B is similar to Port A in structure. It can be configured to perform one or more of the
following functions:
J
Standard MCU I/O Mode
J
PLD I/O
J
Address Out – address lines A[0-7] for 8-bit multiplexed bus, or address lines
A[8-15] for 16-bit multiplexed bus are assigned to pins PB[0-7].
J
Special Function Out – pins PB0 - PB3 are configured as dedicated Timer outputs.
Figure 22 shows the structure of a Port B pin. If the pin is configured as an output port, the
multiplexer selects one of its four inputs as output. If the pin is configured as input, the input
connects to :
J
Data In Register as input in Standard MCU I/O Mode
or
J
PB Macrocell as PLD input
I/OPorts
(Cont.)
相關(guān)PDF資料
PDF描述
ZPSD511B1V Field Programmable Microcontroller Peripherals(可編程邏輯，零功耗，16K位SRAM,40個(gè)可編程I/O,通用PLD有61個(gè)輸入)
ZPSD602(V)E1 Field Programmable Microcontroller Peripherals with Embedded Micro--Cell(可編程邏輯，零功耗，4K位SRAM,26個(gè)可編程I/O,通用PLD有63個(gè)輸入)
ZPSD601(V)E1 Field Programmable Microcontroller Peripherals with Embedded Micro--Cell(可編程邏輯，零功耗，4K位SRAM,26個(gè)可編程I/O,通用PLD有63個(gè)輸入)
ZPSD603(V)E1 Field Programmable Microcontroller Peripherals with Embedded Micro--Cell(可編程邏輯，零功耗，4K位SRAM,26個(gè)可編程I/O,通用PLD有63個(gè)輸入)
ZPSD611(V)E1 Field Programmable Microcontroller Peripherals with Embedded Micro--Cell(可編程邏輯，零功耗，4K位SRAM,26個(gè)可編程I/O,通用PLD有63個(gè)輸入)
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
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ZPSD513B1-C-15L 制造商:WSI 功能描述:
ZPSD602E1-15L 制造商:WSI 功能描述:
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