參數(shù)資料
型號: ZPSD412A1
英文描述: Field Programmable Microcontroller Peripherals(可編程邏輯,零功耗,16K位SRAM,40個可編程I/O,通用PLD有37個輸入)
中文描述: 現(xiàn)場可編程微控制器外圍設備(可編程邏輯,零功耗,16K的位的SRAM,40余個可編程輸入/輸出,通用PLD的有37個輸入)
文件頁數(shù): 88/108頁
文件大?。?/td> 626K
代理商: ZPSD412A1
ZPSD4XX Famly
5-88
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
V
CC
Supply Voltage
All Speeds
2.7
3
5.5
V
V
IH
High Level Input Voltage
2.7 V < V
CC
< 5.5 V
.7 V
CC
V
CC
+.5
V
V
IL
Low Level Input Voltage
2.7 V < V
CC
< 5.5 V
–0.5
.3 V
CC
V
V
IH1
Reset High Level Input Voltage
(Note 1)
.8 V
CC
V
CC
+.5
V
V
IL1
Reset Low Level Input Voltage
(Note 1)
–.5
.2 V
CC
–.1
V
V
HYS
Reset Pin Hysteresis
0.3
V
V
OL
Output Low Voltage
I
OL
= 20 μA, V
CC
= 2.7 V
0.01
0.1
V
I
OL
= 4 mA, V
CC
= 2.7 V
0.15
0.45
V
V
OH
Output High Voltage
I
OH
= –20 μA, V
CC
= 2.7 V
2.9
2.99
V
I
OH
= –1 mA, V
CC
= 2.7 V
2.4
2.6
V
V
SBY
SRAM Standby Voltage
2.7
V
CC
V
I
SBY
SRAM Standby Current
V
CC
= 0 V
0.5
1
μA
I
IDLE
Idle Current (V
STBY
Pin)
V
CC
> V
SBY
–0.1
0.1
μA
V
DF
SRAM Data Retention Voltage
Only on V
STBY
2
V
I
SB
Standby Supply
Current
Power Down Mode
CSI >V
CC
–.3 V (Note 2)
5
15
μA
Sleep Mode
CSI >V
CC
–.3 V (Note 3)
1
5
μA
I
LI
Input Leakage Current
V
SS
< V
IN
< V
CC
–1
±.1
1
μA
I
LO
Output Leakage Current
0.45 < V
IN
< V
CC
–10
±5
10
μA
ZPLD_TURBO = OFF,
f = 0 MHz (Note 4)
I
CC
(DC)
(Note 17a)
Operating
Supply Current
ZPLD Only
ZPLD_TURBO = ON,
f = 0 MHz
200
400
μA/PT
ZPLD AC Base
(Note 4)
CMiser = ON
(8-Bit Bus Mode)
EPROM AC Adder
0.4
1.0
mA/MHz
I
CC
(AC)
(Note 17a)
All Other Cases
0.9
1.7
mA/MHz
CMiser = ON and
8-Bit Bus Mode
0.7
1.3
mA/MHz
SRAM AC Adder
CMiser = ON and
16-Bit Bus MoDe
1
2
mA/MHz
CMiser = OFF
1.9
3.8
mA/MHz
DC Characteristics (ZPSD4XXV Versions, Advance Information)
(3.0 V ± 10% Versions)
NOTES:
14. Reset input has hysteresis. V
IL1
is valid at or below .2V
CC
–.1. V
IH1
is valid at or above .8V
CC
.
15. CSI deselected or internal PD is active.
16. Sleep mode bit is set and internal PD is active.
17. See ZPLD ICC/Frequency Power Consumption graph for details.
17a. I
OUT
= 0 mA.
See page 5-108
for CMiser Errata.
相關PDF資料
PDF描述
ZPSD412A2 Field Programmable Microcontroller Peripherals(可編程邏輯,零功耗,16K位SRAM,40個可編程I/O,通用PLD有59個輸入)
ZPSD402A1 Field Programmable Microcontroller Peripherals(可編程邏輯,零功耗,16K位SRAM,40個可編程I/O,通用PLD有37個輸入)
ZPSD402A2 Field Programmable Microcontroller Peripherals(可編程邏輯,零功耗,16K位SRAM,40個可編程I/O,通用PLD有59個輸入)
ZPSD411A1 Field Programmable Microcontroller Peripherals(可編程邏輯,零功耗,16K位SRAM,40個可編程I/O,通用PLD有37個輸入)
ZPSD411A2 Field Programmable Microcontroller Peripherals(可編程邏輯,零功耗,16K位SRAM,40個可編程I/O,通用PLD有59個輸入)
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