參數(shù)資料
型號: ZPSD302V
英文描述: Field Programmable Microcontroller Peripherals(可編程邏輯,零功耗,16K位SRAM,19個可編程I/O,通用PLD有16個輸入)
中文描述: 現(xiàn)場可編程微控制器外圍設(shè)備(可編程邏輯,零功耗,16K的位的SRAM,19余個可編程輸入/輸出,通用PLD的有16個輸入)
文件頁數(shù): 75/90頁
文件大?。?/td> 491K
代理商: ZPSD302V
3-79
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Single Chip Zero Power Programmable Peripheral for Microcontroller-based Applications
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19 Individually Configurable I/O pins that can be used as:
— Microcontroller I/O port expansion
— Programmable Address Decoder (PAD) I/O
— Latched address output
— Open drain or CMOS
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Two Zero Power Programmable Arrays (PAD A and PAD B)
— Total of 40 Product Terms and up to 16 Inputs and 24 Outputs
— Direct Address Decoding up to 1 Meg address space and up to 16 Meg with paging
— Logic replacement
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“No Glue” Microcontroller Chip-Set
— Built-in address latches for multiplexed address/data bus
— Non-multiplexed address/data bus mode
— 8-bit data bus width
— ALE and Reset polarity programmable
— Selectable modes for read and write control bus as RD/WR, R/W/E, or R/W/DS
— PSEN pin for 8051 users
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Built-In Page Logic
— To Expand the Address Space of Microcontrollers with Limited Address Space
Capabilities
— Up to 16 pages
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512 Kbits of Zero Power UV EPROM
— Configured as 64K x 8
— Divides into 8 equal mappable blocks for optimized mapping
— Block resolution is 8K x 8
— 70 ns EPROM access time, including input latches and PAD address decoding.
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16 Kbit Zero Power Static SRAM
— Configured as 2K x 8
— 70 ns SRAM access time, including input latches and PAD address decoding
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Address/Data Track Mode
— Enables easy Interface to Shared Resources (e.g., Mail Box SRAM) with other
Microcontrollers or a Host Processor
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CMiser-Bit
— Programmable option to further reduce power consumption
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Built-In Security
— Locks the ZPSD312 and PAD Decoding Configuration
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Available in a Choice of Packages
— 44 Pin PLDCC, CLDCC and TQFP
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Simple PSD Development Software:
Configure the ZPSD312 on an IBM PC
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Pin and Function Compatible with ZPSD311, ZPSD313 and ZPSD314R devices.
Key Features
Programmable Peripheral
ZPSD312
Field-Programmable Microcontroller Peripheral
相關(guān)PDF資料
PDF描述
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ZPSD403A2 Field Programmable Microcontroller Peripherals(可編程邏輯,零功耗,16K位SRAM,40個可編程I/O,通用PLD有59個輸入)
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