參數(shù)資料
型號(hào): ZL20200LDG
廠商: Zarlink Semiconductor Inc.
英文描述: Dual Band IS136/AMPS Transceiver
中文描述: 雙頻IS136/AMPS收發(fā)器
文件頁數(shù): 22/51頁
文件大?。?/td> 485K
代理商: ZL20200LDG
ZL20200
Data Sheet
22
Zarlink Semiconductor Inc.
2.0 Programming and Control
Programming via the serial bus is via 24 bit words with a 4 bit address as shown below
Bit23 (MSB) is loaded first. Bits 3:0 are used as address bits for the control registers. Details of serial bus timing are
shown in Figure 13.
Figure 13 - Serial Bus Timing
Enable1 and Enable2 need only be asserted after loading registers 0 to 3, the power control registers. These
registers should be loaded with Enable1 and Enable2 low. All other registers can be loaded with Enable1 and
Enable2 high or low.
2.1 Power Control Registers - Address 0 to 3
These registers are used in conjunction with the TX RXB and ENABLE1 and ENABLE2 control pins to power up the
required sections of the device for any required mode. This enables power consumption to be optimized under all
conditions. Figures 4 - 7, which show the receive and transmit paths in detail, show which sections are powered up
by each control bit.
23
22
21
20
19
18
17
17
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
Data
Address
SCLK
SDAT
SLATCH
Bit 23
Bit 22
Bit 21
Bit 0
t1
t2
t3
t4
t5
t6
ENABLE1/2
t7
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