- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄373782 > ZL20200LDE (Zarlink Semiconductor Inc.) Dual Band IS136/AMPS Transceiver PDF資料下載
參數(shù)資料
| 型號： | ZL20200LDE |
| 廠商： | Zarlink Semiconductor Inc. |
| 英文描述： | Dual Band IS136/AMPS Transceiver |
| 中文描述： | 雙頻IS136/AMPS收發(fā)器 |
| 文件頁數(shù)： | 37/52頁 |
| 文件大?。?/td> | 516K |
| 代理商： | ZL20200LDE |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁當(dāng)前第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁
ZL20200
Data Sheet
37
Zarlink Semiconductor Inc.
2.10 Receive VHF PLL Reference Divider Programming Register - Address 12
Bits 23:19 are unused and should be set to '0'
Bit 18 selects common reference divider for VHF receive and transmit PLLs ('0' to select). If a common reference
divider is selected then the transmit VHF reference divider is used which must be programmed in register 13.
Bits 17:4 set the Reference divider value (Bit 17 = MSB)
2.11 Transmit VHF PLL Divider Programming Register - Address 13
Bits 23:21 are unused and should be set to '0'
Bits 20:8 set M counter value (Bit 20 = MSB)
Bits 7:4 set A counter value - max value = 15 (Bit 7 = MSB)
Programming is identical to that for the receive VHF PLL register 11.
2.12 Transmit VHF PLL Reference Divider Programming Register Address 14
Bits 23:18 are unused and should be set to '0'
Bits 17:4 set the Reference counter value (Bit 17 = MSB)
2.13 PLL Lock Detect & Fractional N Compensation Programming Register Address 15
2.13.1 Fractional N Compensation
Bits 23:16 set the value for fractional N compensation in the UHF PLL with bit 23 as MSB. The value for the
compensation is dependent on a number of parameters which are described in the synthesizer section.
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
0
0
0
0
0
1
1
0
0
X
X
X
X
X
RS
Receive VHF PLL Reference Counter Value
Address
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
0
0
0
1
1
0
1
X
X
X
M Counter Value
A Counter Value
Address
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
0
0
0
0
0
0
1
1
1
0
X
X
X
X
X
X
Transmit VHF PLL Reference Counter Value
Address
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
1
1
1
1
Fractional N Compensation
UHF PLL
Lock Count
Transmit VHF PLL
Lock Count
Receive VHF PLL
Lock Count
Address
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| ZL20250 | 2.5G Multimode Transceiver |
| ZL20250LCE | 2.5G Multimode Transceiver |
| ZL20250LCF | 2.5G Multimode Transceiver |
| ZL30100QDG1 | T1/E1 System Synchronizer |
| ZL30100 | T1/E1 System Synchronizer |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| ZL20200LDF | 制造商:ZARLINK 制造商全稱:Zarlink Semiconductor Inc 功能描述:Dual Band IS136/AMPS Transceiver |
| ZL20200LDF1 | 制造商:Microsemi Corporation 功能描述: |
| ZL20200LDG | 制造商:ZARLINK 制造商全稱:Zarlink Semiconductor Inc 功能描述:Dual Band IS136/AMPS Transceiver |
| ZL20200LDG1 | 制造商:Microsemi Corporation 功能描述: |
| ZL20250 | 制造商:ZARLINK 制造商全稱:Zarlink Semiconductor Inc 功能描述:2.5G Multimode Transceiver |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。