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參數(shù)資料
| 型號(hào)： | ZL10310GAC |
| 廠商： | Zarlink Semiconductor Inc. |
| 英文描述： | Digital Television DVB-T-On-a-Chip Processor |
| 中文描述： | 數(shù)字電視的DVB - T -上一芯片處理器 |
| 文件頁數(shù)： | 8/40頁 |
| 文件大?。?/td> | 352K |
| 代理商： | ZL10310GAC |
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ZL10310/ZL10311
Data Sheet
8
Zarlink Semiconductor Inc.
4.5 MPEG-2 Video Decoder
The MPEG-2 Video Decoder provides complete decoding and synchronized playback of MPEG-2 MP@ML (Main
Profile at Main Level) video streams. It supports the decoding of still pictures as well as moving video, with error
concealment when necessary. A command driven local controller minimizes the amount of application software
needed to control the decoding / channel change process.
The decoder accepts PES from the Transport De-multiplexer, with average rates of up to 15 Mbps. PES header
parsing supports the extraction of Presentation Time Stamp (PTS) values, which are then used by the audio/ video
synchronization hardware. PES or ES streams can be directly decoded from SDRAM in the Video Clip mode of
operation.
Feature summary:
Packetised MPEG-2 MP @ ML video streams from the transport demultiplexer or from SDRAM
MPEG-1 video (ES) streams from SDRAM
Sustained bit rates from 1.5 Mbps to 15 Mbps.
Local processor driven by commands from the application processor
Sophisticated error concealment based on the use of stored motion vectors from the previous row
Supports the decoding of still images
Automatic or manual image re-sizing
Conversion of MPEG-1, 24 Hz progressive scan, pictures to 60 Hz interlaced (3:2 pull-down)
4.6 PowerPC 405
TM
Processor
An integrated PowerPC 405
TM
processor core is provided for applications and control software, and this provides
approx. 150 Drhystone MIPS with a clock of 108 MHz.
It has instruction and data caches with lock down facilities such that defined areas can be used as general purpose
ram. The processor has its own internal bus to which is attached the caches, all the peripherals, and a DMA
controller. Code can thus be executed, using internal resources, whilst the MPEG decoders are using the SDRAM.
This processor bus is also connected to an auxiliary external bus, which is used for Flash code transfer during the
power on routine, and for Flash write operations. PCMCIA, and IDE data transfers also use this bus to provide data
and address signals, but their respective control signals have dedicated pins. A bridge to the internal multi-master
bus provides software access to the external SDRAM.
All internal and external memory is in a unified address space, and a DMA controller supports high speed data
transfers. Controllers are provided for two smart cards, an RS232 modem, a serial Codec, an I
2
C master, a
synchronous serial port, and an IRDA interface. Individual bit I/O is also supported.
Key Features:
PowerPC 405
TM
Processor Core running at 108 MHz
Integrated instruction and data caches (16k/16k) with lock down
Integrated set top box peripheral controllers
Four channel DMA controller for peripheral and data transfers
Dedicated internal processor bus with its own SDRAM controller and auxiliary bus
Bridge to the decoder multi-master bus and shared SDRAM
Real Time Counters
Watch dog timer
Interrupt Controller
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| ZL10311GAC | Digital Television DVB-T-On-a-Chip Processor |
| ZL10311 | Digital Television DVB-T-On-a-Chip Processor |
| ZL10310 | Power Quality Recorder; Bandwidth Max:60Hz; Kit Contents:CTs, Voltage Leads, Ground Probes and Leads, PC Software and Download Cable; Voltage Rating:600V RoHS Compliant: NA |
| ZL10310DTV-SOC | Digital Television DVB-T-On-a-Chip Processor |
| ZL10311DTV-SOC | Digital Television DVB-T-On-a-Chip Processor |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| ZL10311 | 制造商:ZARLINK 制造商全稱:Zarlink Semiconductor Inc 功能描述:Digital Television DVB-T-On-a-Chip Processor |
| ZL10311/GAC | 制造商:ZARLINK 制造商全稱:Zarlink Semiconductor Inc 功能描述:Digital Television DVB-T-On-a-Chip Processor |
| ZL10311DTV-SOC | 制造商:ZARLINK 制造商全稱:Zarlink Semiconductor Inc 功能描述:Digital Television DVB-T-On-a-Chip Processor |
| ZL10311GAC | 制造商:ZARLINK 制造商全稱:Zarlink Semiconductor Inc 功能描述:Digital Television DVB-T-On-a-Chip Processor |
| ZL10312 | 制造商:ZARLINK 制造商全稱:Zarlink Semiconductor Inc 功能描述:Satellite Demodulator |
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