參數(shù)資料
型號(hào)： ZL10039LCG
廠商： ZARLINK SEMICONDUCTOR INC
元件分類(lèi)： 消費(fèi)家電
英文描述： 100A clamp for PQ meters RoHS Compliant: NA
中文描述： SPECIALTY CONSUMER CIRCUIT, QCC28
封裝： 5 X 5 MM, MO-220, QFN-28
文件頁(yè)數(shù)： 7/35頁(yè)
文件大?。?/td> 694K
代理商： ZL10039LCG
ZL10039
Data Sheet
7
Zarlink Semiconductor Inc.
algorithm uses a frequency locked loop, which locks the filter bandwidth to a reference frequency derived from the
crystal reference input frequency. Further details are provided in the programming section.
The filters are followed by a programmable gain stage. This provides twelve 1.5 dB gain steps. These can be used
for optimising performance at different symbol rates and for adjusting the output level in applications not using
ZL10313.
The differential outputs of each channel stage are designed for low impedance drive capability and low
intermodulation.
1.2.3 RF bypass
The ZL10039 provides a single ended bypass function, which can be used for driving a second receiver module.
The electrical characteristics of the RF input are unchanged whether the RF bypass is enabled or disabled.
The RF Bypass powers up in the enabled state and can also operate with the remainder of the device in power
down modes.
1.3 Local Oscillator Generation
1.3.1 On Chip VCO
The local oscillator on the ZL10039 is fully integrated. It consists of three independently selectable oscillator stages
with sub bands. The three oscillators and sub-bands are designed to provide optimum phase noise performance
over the required tuning range of 950 to 2150 MHz, over operating conditions and process variations.
The local oscillators operate at a harmonic of the required local oscillator frequency and are divided down to the
required LO frequency. The required divider ratio is automatically selected by the local oscillator control logic.
The oscillators are fully controlled by an on-chip automatic tuning algorithm. The user simply programs the required
LO frequency. The control logic automatically selects the required VCO and sub band to give optimum
performance. VCO settling time is minimized as different tuning algorithms are used, depending on the magnitude
of the LO frequency change required. This choice of algorithm is also automatic and does not require user
intervention.
The oscillator control logic tracks any changes in operating conditions and will retune the VCO if necessary,
however hysteresis is built into this function to avoid unnecessary switching.
All oscillator components are included on the chip including the VCO varactor. An external loop filter is required as
part of the PLL frequency synthesiser.
1.3.2 PLL Frequency Synthesiser
The fully integrated PLL frequency synthesiser section controls the LO frequency. The only external requirements
are crystal reference and simple second order loop filter. The PLL can be operated up to comparison frequencies of
2 MHz enabling a wide loop bandwidth for maximizing the close in phase noise performance.
The local oscillator input signal is multiplexed from the active oscillator to an internal preamplifier, which provides
gain and reverse isolation from the divider signals. The output of the preamplifier provides the input to a 15-bit fully
programmable divider with MN+A architecture incorporating a dual modulus 16/17 prescaler.
The output of the programmable divider is fed to the phase comparator where it is compared in both phase and
frequency domain with the comparison frequency. This frequency is derived either from the on-board crystal
controlled oscillator or from an external reference source. In both cases the reference frequency is divided down to
the comparison frequency by the reference divider, which is programmable into 1 of 15 ratios.
相關(guān)PDF資料
PDF描述
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
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ZL10060LDG1 制造商:ZARLINK 制造商全稱(chēng):Zarlink Semiconductor Inc 功能描述:MOPLL with IF AGC Amplifier
ZL101 制造商:Velleman Inc 功能描述:Mini Torch With 3 White LEDs
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