參數(shù)資料
型號(hào)： Z9025900ZEM
英文描述： SCR Thyristor; SCR Type:Standard Gate; Peak Repetitive Off-State Voltage, Vdrm:600V; On-State RMS Current, IT(rms):35A; Peak Non Repetitive Surge Current, Itsm:500A; Gate Trigger Current Max, Igt:40uA
中文描述： 消費(fèi)性IC
文件頁(yè)數(shù)： 19/30頁(yè)
文件大小： 938K
代理商： Z9025900ZEM
Z90255 ROM and Z90251 OTP
32 KB Television Controller with OSD
PS001300-TVC1099
Preliminary
19
2
MEMORY DESCRIPTION
A total of 300 bytes of general purpose register memory is implemented in the Z90255.
These registers are composed of 236 registers from the standard register file and 64
registers from the expanded register file.
2.1 Standard Register File
The Z90255 Standard Register File consists of two I/O port registers (02h and 03h), 236
general purpose registers (04h-EFh) and 15 (F1h-FFh) control and status registers.
Registers 00h, 01h, and F0h are reserved. Figure 5 is the register file map. Instructions can
access registers directly or indirectly with an 8-bit address field. This also allows short 4-
bit addressing using the Register Pointer. In the 4-bit mode, the register file is divided into
sixteen working register groups. The upper nibble of the Register Pointer (FDh) addresses
the starting location of the active working-register group.
Note:
Registers E0h-EFh are only accessed through a working-register and indirect
addressing mode.
2.2 Expanded Register File
The register file has been expanded to provide additional system control registers,
additional general purpose registers, and expanded mapping of peripheral devices and I/O
ports in the register address area.
The lower nibble of the Register Pointer (FDh) addresses the Expanded Register File
(ERF) Bank. The 0h value in the lower nibble identifies the Standard Register File to be
addressed. Any other value from 1h to Fh selects an ERF Bank. When an ERF Bank is
selected, register addresses from 00h to 0Fh access the sixteen ERF Bank registers, which
in effect replace the first sixteen locations of the Z90255 Standard Register File. Only ERF
Bank 4, ERF Bank 5, ERF Bank 6, ERF Bank 7,
ERF Bank A, ERF Bank B, ERF Bank C
and ERF Bank F are implemented in the Z90255 controller (Table 4).
2.3 Program Memory
The Z90255 has 32KB of program memory. Refer to Figure 6. The first 12 bytes of the
program memory are reserved for the interrupt vectors. These locations contain six 16-bit
vectors that correspond to interrupt and program control routine addresses which are
passed to the specified vector address. The IRQ0 vector is permanently assigned to the IR
interrupt request. The IRQ1 vector is permanently assigned to the V
SYNC
and H
SYNC
interrupt request. Program memory starts at address 000Ch after being reset.
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