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參數(shù)資料
| 型號： | Z89462 |
| 廠商： | ZiLOG, Inc. |
| 英文描述： | CAP .033UF 250V METAL POLYESTER |
| 中文描述： | 16位定點數(shù)字信號處理器 |
| 文件頁數(shù)： | 1/8頁 |
| 文件大小： | 104K |
| 代理商： | Z89462 |
1
Z89462
CP95DSP0400
P R E L I M I N A R Y
FEATURES
Z89462
16-B
IT
, F
IXED
-P
OINT
D
IGITAL
S
IGNAL
P
ROCESSOR
P
RELIMINARY
C
USTOMER
P
ROCUREMENT
S
PECIFICATION
CP95DSP0400 (8/95)
Prog. RAM
(K Words)
Prog./Data
(K Words)
Data RAM
(Words)
Speed
(MHz)
Part
Z89462
1
64
512
20, 40
I
100-Pin QFP and 124-Pin PGA Packages
I
0
°
C to +70
°
C Temperature Range
I
3.3- to 5.0-Volt Operating Range
40 MHz Operation @ 5.0V
20 MHz Operation @ 3.3V
I
Six RAM Pointers for 4K-Word RAM Banks
I
Three Maskable Vectored Interrupts, Edge or Level
Trigger Selectable
I
Enhanced Instruction Set
I
Single-Cycle Instruction Execution
I
Four-Stage Pipeline
On-Board Peripherals
I
Dual 8/16-Bit CODEC Interface
I
Wait-State Generator
I
Two 16-Bit Timer/Counters
I
Dynamic Program Bus Sizing
GENERAL DESCRIPTION
The Z89462 is a high-performance Digital Signal Processor
(DSP) optimized for processing and transferring data. This
enhanced processor provides an upward migration path
for its Z89C00/Z89321 predecessors.
The DSP provides three 12-bit Register Pointers for each
RAM bank. These pointers may be incremented or
decremented automatically to implement circular buffers
without software overhead.
Three prioritized and individually maskable interrupts are
provided for use by external peripherals requiring service
from the DSP. The interrupt inputs can be individually
conditioned for edge or level trigger. Acknowledgement of
an activated interrupt occurs at the end of an instruction
execution.
Two banks of 512 x 16-bit data RAM are available.
Expansion of the on-chip data RAM is provided through
future upgrades.
External interfaces include Address Bus and Data Bus for
external Program Memory, Address Bus and Data Bus for
external Data Memory, three vectored interrupt ports, and
two input/two output user ports.
Notes:
All Signals with a preceding front slash, "/", are active Low, e.g.,
B//W (WORD is active Low); /B/W (BYTE is active Low, only).
Power connections follow conventional descriptions below:
Connection
Circuit
Device
Power
Ground
V
GND
V
DD
V
SS
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| Z89C00 | 16-BIT DIGITAL SIGNAL PROCESSOR |
| Z8E000 | CMOS Z8 OTP Microcontroller(CMOS Z8系列一次可編程微控制器) |
| Z8E001 | RSNTR 8.00MHZ 0.5% CER SMD-3.4X7.4 -40+85C T&R |
| Z8E520 | 1.5 MBPS USB Device Controller |
| Z8C520 | 1.5 MBPS USB Device Controller |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| Z8946220FSC | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:16-Bit Digital Signal Processor |
| Z8946220GSC | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:16-Bit Digital Signal Processor |
| Z8946240GSC | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:16-Bit Digital Signal Processor |
| Z89C00 | 制造商:ZILOG 制造商全稱:ZILOG 功能描述:16-BIT DIGITAL SIGNAL PROCESSOR |
| Z89C0010VSC | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:16-Bit Digital Signal Processor |
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