參數(shù)資料
型號(hào): Z8913820FSC
廠商: ZILOG INC
元件分類: 數(shù)字信號(hào)處理
英文描述: 8-BIT, 20.48 MHz, MIXED DSP, PQFP100
封裝: QFP-100
文件頁數(shù): 22/65頁
文件大小: 2054K
代理商: Z8913820FSC
Z89138/Z89139
Zilog
Voice Processing Controllers
DS97TAD0201
P R E L I M I N A R Y
29
1
Port 5 (P53-P50). Port 5 is a 4-bit, bidirectional, CMOS
compatible I/O port (Figure 16). These four I/O lines are
configured under software control independently as inputs
or outputs. Port 5 is always available for I/O operation. The
input buffers are Schmitt-triggered. Bits programmed as
outputs can be globally programmed as either push-pull or
open-drain.
Port 5 is a bit programmable general-purpose I/O port. The
control registers for Port 5 are mapped into the expanded
register file (Bank F) of the Z8.
Auto Latch. The Auto Latch on Port 5 puts valid CMOS
levels on all CMOS inputs which are not externally driven.
Whether this level is 0 or 1 cannot be determined. A valid
CMOS level, rather than a floating node, reduces exces-
sive supply current flow in the input buffer.
Figure 16. Port 5 Conguration
OEN
Out
In
Pad
Auto Latch
Port 5
(I/O)
Z89138/139
MCU
R = 500 K
1.5
2.3V Hysteresis
Open-Drain
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